Data processing device utilizing way selection of set associative cache memory based on select data such as parity data
    1.
    发明授权
    Data processing device utilizing way selection of set associative cache memory based on select data such as parity data 有权
    基于诸如奇偶校验数据的选择数据,利用组合关联高速缓冲存储器的方式选择的数据处理装置

    公开(公告)号:US09495299B2

    公开(公告)日:2016-11-15

    申请号:US14367925

    申请日:2011-12-26

    摘要: Part of a plurality of ways are selected from among the ways according to a value of select data created based on tag address information which is part of address information, and cache tags are read. Further, when performing cache fill, the cache memory performs the cache fill on a cache entry selected from part of the ways according to the value of the select data. For select data used for selecting a way, e.g. parity data in connection with tag address information is used. A way to read a cache tag from is selected based on a value of parity data and further, the way of a cache entry to perform cache fill on is selected.

    摘要翻译: 从根据作为地址信息的一部分的标签地址信息创建的选择数据的值的方式中选择多种方式的一部分,并且读取高速缓存标签。 此外,当执行高速缓冲存储器填充时,高速缓存存储器根据选择数据的值对从部分方式中选择的高速缓存条目执行高速缓存填充。 对于用于选择方法的选择数据,例如 使用与标签地址信息相关的奇偶校验数据。 基于奇偶校验数据的值来选择读取缓存标签的方式,并且进一步选择执行高速缓存填充的高速缓存条目的方式。