Arrangement for the testing of semiconductor structures
    2.
    发明授权
    Arrangement for the testing of semiconductor structures 失效
    半导体结构测试的安排

    公开(公告)号:US06373272B1

    公开(公告)日:2002-04-16

    申请号:US09142391

    申请日:1998-09-16

    IPC分类号: G01R3126

    CPC分类号: G01R31/2887

    摘要: The present invention provides an apparatus for the testing of semiconductor structures. The apparatus is provided with a chuck for holding a semiconductor wafer and with needle holders for contact needles, the chuck being provided with a fastening device for the semiconductor wafer and being movable for positioning, controlled using a positioning device, in relation to the contact needles. The object of the present invention is to detect faults, in good time and reliably, of non-serviceable or not fully serviceable chips before separation to avoid unnecessary work for separating and assembling defective chips. The object is attained in that the chuck has a receiving area exposing upwards a lower surface of the semiconductor wafer and a receiving plane therefor. The receiving plane is arranged above the needle carrier, and the contact needles point upwards in such a manner that they contact contact islands of the semiconductor chips on the downwardly directed upper surface of the semiconductor wafer.

    摘要翻译: 本发明提供一种用于半导体结构测试的装置。 该设备设置有用于保持半导体晶片和用于接触针的针保持器的卡盘,该卡盘设置有用于半导体晶片的紧固装置,并且可移动以使用定位装置相对于接触针定位 。 本发明的目的是在分离之前及时且可靠地检测不可维修或不可完全维修的芯片的故障,以避免用于分离和组装有缺陷的芯片的不必要的工作。 实现目的在于卡盘具有向上暴露半导体晶片的下表面的接收区域和用于其的接收平面。 接收平面布置在针架上方,并且接触针以这样的方式指向上方,使得它们接触半导体晶片的向下指向的上表面上的半导体芯片的接触岛。

    MULTILAYER PRINTED CIRCUIT BOARD MANUFACTURE
    5.
    发明申请
    MULTILAYER PRINTED CIRCUIT BOARD MANUFACTURE 审中-公开
    多层印刷电路板制造

    公开(公告)号:US20120037312A1

    公开(公告)日:2012-02-16

    申请号:US13265545

    申请日:2010-04-15

    IPC分类号: B32B37/14

    摘要: The present invention relates to a process for manufacture of multilayer printed circuit boards and articles formed thereby, especially IC substrates. The inventive process utilizes in individual process steps inorganic silicates and organosilane bonding mixtures to provide adhesion between layers of copper and dielectric materials. Said process leads to an enhanced adhesive strength, improved mechanical and thermal stress resistance as well as humidity resistance of multilayer printed circuit boards and IC substrates.

    摘要翻译: 本发明涉及用于制造由此形成的多层印刷电路板和制品的方法,特别是IC基板。 本发明的方法在单独的工艺步骤中利用无机硅酸盐和有机硅烷键合混合物来提供铜和电介质材料的层之间的粘附。 所述方法导致增强的粘合强度,改进的机械和热应力抗性以及多层印刷电路板和IC基片的耐湿性。