Double Schottky-gate field effect transistor
    1.
    发明授权
    Double Schottky-gate field effect transistor 失效
    双肖特基栅场效应晶体管

    公开(公告)号:US4709251A

    公开(公告)日:1987-11-24

    申请号:US768486

    申请日:1985-08-21

    申请人: Tomihiro Suzuki

    发明人: Tomihiro Suzuki

    摘要: A Schottky-gate field effect transistor comprises a semi-insulative semiconductor substrate, an active layer formed on one surface of the substrate, a source electrode and a drain electrode on the active layer in ohmic contact thereto, respectively, a first Schottky gate electrode on the active layer between the source and drain electrodes, and a second Schottky gate electrode on the active layer between the drain electrode and the first gate electrode. A portion of the active layer underneath the second gate electrode has a sheet resistance smaller than that of the active layer portion underneath the first gate electrode. The source electrode and the second electrode is electrically interconnected by connection means formed on the substrate.

    摘要翻译: 肖特基半导体场效应晶体管分别包括半绝缘半导体衬底,形成在衬底的一个表面上的有源层,有源层上的源电极和漏电极,与其欧姆接触;第一肖特基栅电极, 源极和漏极之间的有源层,以及在漏电极和第一栅电极之间的有源层上的第二肖特基栅电极。 第二栅电极下面的有源层的一部分的薄层电阻小于第一栅电极下方的有源层部分的薄层电阻。 源电极和第二电极通过形成在基板上的连接装置电互连。

    Logic gate having low power consumption
    2.
    发明授权
    Logic gate having low power consumption 失效
    逻辑门具有低功耗

    公开(公告)号:US4755695A

    公开(公告)日:1988-07-05

    申请号:US893496

    申请日:1986-08-05

    申请人: Tomihiro Suzuki

    发明人: Tomihiro Suzuki

    CPC分类号: H03K19/01714 H03K19/0952

    摘要: A semiconductor logic circuit device uses a plurality of MESFETs and a Schottky barrier diode (11) interconnected in such a way that one MESFET forms a switching input (9), another MESFET may form a load (8), still another MESFET forms a buffer amplifier stage (10), a further MESFET forms a current source, and the Schottky barrier diode operates as a speed-up capacitor for increasing the response characteristic of the buffer stage. Different types of logic circuits may be formed.

    摘要翻译: 半导体逻辑电路器件使用以一个MESFET形成开关输入(9)的方式互连的多个MESFET和肖特基势垒二极管(11),另一个MESFET可以形成负载(8),另一个MESFET形成缓冲器 放大器级(10),另一个MESFET形成电流源,肖特基势垒二极管用作加速电容器,用于增加缓冲级的响应特性。 可以形成不同类型的逻辑电路。

    Monolithic microwave integrated circuit with probing pads
    3.
    发明授权
    Monolithic microwave integrated circuit with probing pads 失效
    具有探测垫的单片微波集成电路

    公开(公告)号:US4801867A

    公开(公告)日:1989-01-31

    申请号:US119214

    申请日:1987-11-06

    申请人: Tomihiro Suzuki

    发明人: Tomihiro Suzuki

    摘要: In monolithic microwave integrated circuits of resistance-capacitance construction, selection after production can be easily performed without sacrificing high frequency characteristics by adding thereto composing pads such as pads for signal, pads for power source, pads for bias and the like and pads for measuring direct current characteristics and selecting chips. Further, said monolithic microwave integrated circuits added with pads for measuring and selecting direct current characteristics can be easily selected by probing them on wafers.

    摘要翻译: 在电阻 - 电容结构的单片微波集成电路中,可以容易地进行生产后的选择,而不会通过添加组合焊盘,例如用于信号的焊盘,用于电源的焊盘,用于偏压的焊盘等,而不牺牲高频特性,以及用于直接测量的焊盘 电流特性和选择芯片。 此外,添加有用于测量和选择直流特性的焊盘的所述单片微波集成电路可以通过在晶片上探测来容易地选择。