公开(公告)号：US20060274864A1

公开(公告)日：2006-12-07

申请号：US11439123

申请日：2006-05-24

申请人： Tomohiro Ohama ,  Junkichi Sugita ,  Nobuyuki Asai

发明人： Tomohiro Ohama ,  Junkichi Sugita ,  Nobuyuki Asai

IPC分类号： H04L27/06

CPC分类号： H04L7/04 ,  H03L7/093 ,  H04L2027/0016 ,  H04L2027/0095

摘要： A frequency control device capable of detecting a frame sync pattern and generating a frequency information accurately even if a reproduction signal is not zero-crossed, and an information reproduction apparatus having the same, which includes an oscillation circuit outputting a clock having a frequency corresponding to a control signal; a converter sampling an input analog signal having a predetermined pattern based on the clock and converting the same to a digital signal; and a frequency detection device detecting an object to be a sync pattern from a changing trend of the digital signal, generating a frequency information for controlling a reproduction clock based on the detected object to be the sync pattern, and outputting the same as the control signal to the oscillation circuit.

摘要翻译： 一种频率控制装置，其能够检测帧同步码型，并且即使再现信号不是零交叉也能准确地产生频率信息，以及具有该频率控制装置的信息再现装置，包括：振荡电路，输出具有对应于 控制信号; 转换器基于时钟对具有预定模式的输入模拟信号进行采样并将其转换为数字信号; 以及频率检测装置，根据数字信号的变化趋势来检测作为同步模式的对象，根据检测对象产生用于控制再生时钟的频率信息为同步模式，并将其输出为控制信号 到振荡电路。

公开(公告)号：US07693246B2

公开(公告)日：2010-04-06

申请号：US11439123

申请日：2006-05-24

申请人： Tomohiro Ohama ,  Junkichi Sugita ,  Nobuyuki Asai

发明人： Tomohiro Ohama ,  Junkichi Sugita ,  Nobuyuki Asai

IPC分类号： H04L7/00 ,  H03D3/24 ,  G11B15/00

CPC分类号： H04L7/04 ,  H03L7/093 ,  H04L2027/0016 ,  H04L2027/0095

摘要： A frequency control device capable of detecting a frame sync pattern and generating a frequency information accurately even if a reproduction signal is not zero-crossed, and an information reproduction apparatus having the same, which includes an oscillation circuit outputting a clock having a frequency corresponding to a control signal; a converter sampling an input analog signal having a predetermined pattern based on the clock and converting the same to a digital signal; and a frequency detection device detecting an object to be a sync pattern from a changing trend of the digital signal, generating a frequency information for controlling a reproduction clock based on the detected object to be the sync pattern, and outputting the same as the control signal to the oscillation circuit.

摘要翻译： 一种频率控制装置，其能够检测帧同步码型，并且即使再现信号不是零交叉也能准确地产生频率信息，以及具有该频率控制装置的信息再现装置，包括：振荡电路，输出具有对应于 控制信号; 转换器基于时钟对具有预定模式的输入模拟信号进行采样并将其转换为数字信号; 以及频率检测装置，根据数字信号的变化趋势来检测作为同步模式的对象，根据检测对象产生用于控制再生时钟的频率信息为同步模式，并将其输出为控制信号 到振荡电路。

公开(公告)号：US07663831B2

公开(公告)日：2010-02-16

申请号：US10579541

申请日：2004-11-10

申请人： Kenichi Hayashi ,  Masaki Endo ,  Tomohiro Ohama

发明人： Kenichi Hayashi ,  Masaki Endo ,  Tomohiro Ohama

IPC分类号： G11B5/09

CPC分类号： G11B20/10009 ,  G11B20/10037 ,  G11B20/10222 ,  G11B20/10425 ,  G11B20/1403 ,  G11B2020/1476

摘要： The present invention relates to a reproducing apparatus which, in a case where a burst error has occurred, corrects an error preceding a synchronization pattern detected thereafter to have less errors. A bit slip judging section 81 in a bit slip correcting section 53 calculates a bit slip correction amount and a bit slip correction position on the basis of phase error signals detected by a phase error detecting section 51, synchronization pattern signals detected by a synchronization detecting section 52, reproduced clocks and detected data. A FIFO control section 82 controls a FIFO buffer 83 on the basis of the bit slip correction amount and the bit slip correction position, to perform bit slip correction. As a result, in the case where a burst error has occurred, an error preceding a synchronization pattern detected thereafter is corrected, whereby an error reduction can be implemented. The present invention is applicable to a reproducing apparatus.

摘要翻译： 本发明涉及在发生突发错误的情况下，对其后检测到的同步模式之前的错误进行校正以具有更少错误的再现装置。 位移校正部分53中的位滑动判断部分81基于由相位误差检测部分51检测的相位误差信号计算位滑差校正量和位滑差校正位置，同步检测部分检测到的同步模式信号 52，再现时钟和检测数据。 FIFO控制部分82基于位滑差校正量和位滑差校正位置控制FIFO缓冲器83，以进行位滑动校正。 结果，在发生突发错误的情况下，纠正了之后检测到的同步模式之前的错误，从而可以实现错误减少。 本发明可应用于再现装置。

公开(公告)号：US20070103805A1

公开(公告)日：2007-05-10

申请号：US10579541

申请日：2004-11-10

申请人： Kenichi Hayashi ,  Masaki Endo ,  Tomohiro Ohama

发明人： Kenichi Hayashi ,  Masaki Endo ,  Tomohiro Ohama

IPC分类号： G11B20/10

CPC分类号： G11B20/10009 ,  G11B20/10037 ,  G11B20/10222 ,  G11B20/10425 ,  G11B20/1403 ,  G11B2020/1476

摘要： The present invention relates to a reproducing apparatus which, in a case where a burst error has occurred, corrects an error preceding a synchronization pattern detected thereafter to have less errors. A bit slip judging section 81 in a bit slip correcting section 53 calculates a bit slip correction amount and a bit slip correction position on the basis of phase error signals detected by a phase error detecting section 51, synchronization pattern signals detected by a synchronization detecting section 52, reproduced clocks and detected data. A FIFO control section 82 controls a FIFO buffer 83 on the basis of the bit slip correction amount and the bit slip correction position, to perform bit slip correction. As a result, in the case where a burst error has occurred, an error preceding a synchronization pattern detected thereafter is corrected, whereby an error reduction can be implemented. The present invention is applicable to a reproducing apparatus.

摘要翻译： 本发明涉及在发生突发错误的情况下，对其后检测到的同步模式之前的错误进行校正以具有更少错误的再现装置。 位移校正部分53中的位滑动判断部分81基于由相位误差检测部分51检测的相位误差信号计算位滑差校正量和位滑差校正位置，同步检测部分检测到的同步模式信号 52，再现时钟和检测数据。 FIFO控制部分82基于位滑差校正量和位滑差校正位置控制FIFO缓冲器83，以进行位滑动校正。 结果，在发生突发错误的情况下，纠正了之后检测到的同步模式之前的错误，从而可以实现错误减少。 本发明可应用于再现装置。