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公开(公告)号：US08538364B2
公开(公告)日：2013-09-17
申请号：US12789771
申请日：2010-05-28
申请人： Yusaku Katsube , Junichi Takahashi , Masaaki Yamada , Toshihito Habuka , Kenichi Shibata , Fumihito Yamaguchi
发明人： Yusaku Katsube , Junichi Takahashi , Masaaki Yamada , Toshihito Habuka , Kenichi Shibata , Fumihito Yamaguchi
CPC分类号： H04B1/30 , H03H7/0153 , H03H11/1291 , H03H2210/012 , H03H2210/025 , H03H2210/036 , H03H2250/00
摘要： Gain setting can be performed at high speed while reducing DC offset due to a filter cutoff frequency changeover without the need for input signal muting. A filter circuit having first and second filters is capable of allowing settings of first and second cutoff frequencies. First and second filter switch circuits and a charging circuit including a charging resistor and a charging switch are provided. For a first time period, the first switch circuit is controllably turned on while the second switch circuit is controllably turned off, thereby providing the first filter function. For a second time period, the first switch circuit is controllably turned off while the second switch circuit is controllably turned on, thereby providing the second filter function. For the first time period, the charging switch is controllably turned on so that the second capacitor is charged via the charging resistor.
摘要翻译： 增益设置可以高速执行，同时减少由于滤波器截止频率切换引起的直流偏移，而不需要输入信号静音。 具有第一和第二滤波器的滤波器电路能够允许第一和第二截止频率的设置。 提供第一和第二滤波器开关电路以及包括充电电阻器和充电开关的充电电路。 在第一时间段中，第一开关电路被可控地导通，而第二开关电路被可控地关断，从而提供第一滤波器功能。 对于第二时间段，第一开关电路在第二开关电路被可控地接通的同时被可控制地截止，从而提供第二滤波器功能。 在第一时间段中，充电开关被可控地导通，使得第二电容器经由充电电阻器充电。
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2.发明授权Communication semiconductor integrated circuit, radio communication system, and adjustment method of gain and offset 有权通信半导体集成电路，无线电通信系统以及增益和偏移调整方法公开(公告)号：US07961821B2
公开(公告)日：2011-06-14
申请号：US12276532
申请日：2008-11-24
IPC分类号： H04L27/08
CPC分类号： H04L27/3809 , H03G3/3068 , H04L25/061 , H04L27/2647
摘要： A D.C. offset canceling and gain adjusting techniques permitting completion of correction of D.C. offsets and gain adjustment of amplifiers for amplifying reception signals in a radio communication system are provided. A communication semiconductor integrated circuit has a plurality of low-pass filters and variable gain amplifiers which are alternately connected in multiple stages, and high gain amplifier circuits for amplifying reception signals to a predetermined amplitude level. Offset cancellation values are generated by detecting D.C. offsets of amplifiers for amplifying reception signals according to a set gain, and stored into a memory, and read out of the memory to cancel the D.C. offsets of the amplifiers when starting reception and altering the gain. Gain setting in a high gain amplifying section is accomplished using rough and precise settings.
摘要翻译： 提供了D.C.偏移消除和增益调整技术，其允许完成D.C.偏移的校正和用于在无线电通信系统中放大接收信号的放大器的增益调整。 通信半导体集成电路具有多个交替连接的多个低通滤波器和可变增益放大器，以及用于将接收信号放大到预定幅度电平的高增益放大器电路。 通过根据设定的增益检测用于放大接收信号的放大器的直流偏移量，并将其存储到存储器中，并从存储器中读出以消除开始接收和改变增益时放大器的直流偏移量来产生偏移抵消值。 高增益放大部分的增益设置是通过粗略和精确的设置实现的。
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3.发明申请COMMUNICATION SEMICONDUCTOR INTEGRATED CIRCUIT, RADIO COMMUNICATION SYSTEM, AND ADJUSTMENT METHOD OF GAIN AND OFFSET 有权通信半导体集成电路，无线电通信系统以及增益和偏移的调整方法公开(公告)号：US20090080577A1
公开(公告)日：2009-03-26
申请号：US12276532
申请日：2008-11-24
IPC分类号： H04L27/08
CPC分类号： H04L27/3809 , H03G3/3068 , H04L25/061 , H04L27/2647
摘要： A D.C. offset canceling and gain adjusting techniques permitting completion of correction of D.C. offsets and gain adjustment of amplifiers for amplifying reception signals in a radio communication system are provided. A communication semiconductor integrated circuit has a plurality of low-pass filters and variable gain amplifiers which are alternately connected in multiple stages, and high gain amplifier circuits for amplifying reception signals to a predetermined amplitude level. Offset cancellation values are generated by detecting D.C. offsets of amplifiers for amplifying reception signals according to a set gain, and stored into a memory, and read out of the memory to cancel the D.C. offsets of the amplifiers when starting reception and altering the gain. Gain setting in a high gain amplifying section is accomplished using rough and precise settings.
摘要翻译： 提供了D.C.偏移消除和增益调整技术，其允许完成D.C.偏移的校正和用于在无线电通信系统中放大接收信号的放大器的增益调整。 通信半导体集成电路具有多个交替连接的多个低通滤波器和可变增益放大器，以及用于将接收信号放大到预定幅度电平的高增益放大器电路。 通过根据设定的增益检测用于放大接收信号的放大器的直流偏移量，并将其存储到存储器中，并从存储器中读出以消除开始接收和改变增益时放大器的直流偏移量来产生偏移抵消值。 高增益放大部分的增益设置是通过粗略和精确的设置实现的。
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公开(公告)号：US20110026507A1
公开(公告)日：2011-02-03
申请号：US12789771
申请日：2010-05-28
申请人： Yusaku KATSUBE , Junichi TAKAHASHI , Masaaki YAMADA , Toshihito HABUKA , Kenichi SHIBATA , Fumihito YAMAGUCHI
发明人： Yusaku KATSUBE , Junichi TAKAHASHI , Masaaki YAMADA , Toshihito HABUKA , Kenichi SHIBATA , Fumihito YAMAGUCHI
CPC分类号： H04B1/30 , H03H7/0153 , H03H11/1291 , H03H2210/012 , H03H2210/025 , H03H2210/036 , H03H2250/00
摘要： Gain setting can be performed at high speed while reducing DC offset due to a filter cutoff frequency changeover without the need for input signal muting. A filter circuit having first and second filters is capable of allowing settings of first and second cutoff frequencies. First and second filter switch circuits and a charging circuit including a charging resistor and a charging switch are provided. For a first time period, the first switch circuit is controllably turned on while the second switch circuit is controllably turned off, thereby providing the first filter function. For a second time period, the first switch circuit is controllably turned off while the second switch circuit is controllably turned on, thereby providing the second filter function. For the first time period, the charging switch is controllably turned on so that the second capacitor is charged via the charging resistor.
摘要翻译： 增益设置可以高速执行，同时减少由于滤波器截止频率切换引起的直流偏移，而不需要输入信号静音。 具有第一和第二滤波器的滤波器电路能够允许第一和第二截止频率的设置。 提供第一和第二滤波器开关电路以及包括充电电阻器和充电开关的充电电路。 在第一时间段中，第一开关电路被可控地导通，而第二开关电路被可控地关断，从而提供第一滤波器功能。 对于第二时间段，第一开关电路在第二开关电路被可控地接通的同时被可控制地截止，从而提供第二滤波器功能。 在第一时间段中，充电开关被可控地导通，使得第二电容器经由充电电阻器充电。
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公开(公告)号：US08229384B2
公开(公告)日：2012-07-24
申请号：US12419355
申请日：2009-04-07
IPC分类号： H04B1/06
CPC分类号： H03H7/0153 , H03H7/1708 , H03H7/24 , H03H7/425
摘要： A filter circuit includes first capacitors, second capacitors capable of altering a cutoff frequency by being connected in parallel with the first capacitors, first switches for connecting the second capacitors in parallel with the first capacitors, and charging circuits for the second capacitors. The charging circuits include second switches, and resistances for attenuating the amplitudes of input voltages to be fed to the second capacitors, by being connected in series with the second capacitors. The second capacitors are charged through the resistances in a state where the first switches are turned OFF and where the second switches are turned ON. Thus, a DC offset which is ascribable to the cutoff frequency switching of a filter is reduced.
摘要翻译： 滤波器电路包括第一电容器，能够通过与第一电容器并联连接来改变截止频率的第二电容器，用于将第二电容器与第一电容器并联连接的第一开关和用于第二电容器的充电电路。 充电电路包括第二开关和用于衰减要馈送到第二电容器的输入电压的振幅的电阻，通过与第二电容器串联连接。 在第一开关断开的状态和第二开关导通的状态下，通过电阻对第二电容器进行充电。 因此，降低了归因于滤波器的截止频率切换的DC偏移。
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6.发明授权Communication semiconductor integrated circuit, radio communication system, and adjustment method of gain and offset 失效通信半导体集成电路，无线电通信系统以及增益和偏移调整方法公开(公告)号：US07471748B2
公开(公告)日：2008-12-30
申请号：US10855596
申请日：2004-05-28
IPC分类号： H04L27/08
CPC分类号： H04L27/3809 , H03G3/3068 , H04L25/061 , H04L27/2647
摘要： A D.C. offset canceling technique and a gain adjusting technique permitting completion of correction of D.C. offsets and gain adjustment of amplifiers for amplifying reception signals in a relatively short period of time in a radio communication system, such as a wireless LAN, are to be provided. A communication semiconductor integrated circuit (high frequency IC) has a plurality each of low-pass filters and variable gain amplifiers which are alternately connected in multiple stages, and high gain amplifier circuits for amplifying reception signals to a predetermined amplitude level while eliminating unnecessary waves. Offset cancellation values are generated by detecting in advance D.C. offsets of amplifiers for amplifying reception signals according to a set gain, and stored into a memory, and read out of the memory to cancel the D.C. offsets of the amplifiers at the time of starting reception and altering the gain. Gain setting in a high gain amplifying section for amplifying reception signals is accomplished in two steps, rough setting and precise setting.
摘要翻译： 提供一种D.C.偏移消除技术和允许在诸如无线LAN的无线电通信系统中在相对短的时间段内完成D.C.偏移校正和用于放大接收信号的放大器的增益调整的增益调整技术。 通信半导体集成电路（高频IC）具有多个交替连接的多个低通滤波器和可变增益放大器，以及用于将接收信号放大到预定幅度电平同时消除不必要的波的高增益放大器电路。 通过根据设定的增益预先检测用于放大接收信号的放大器的DC偏移并存储到存储器中并从存储器中读出以消除开始接收时的放大器的DC偏移而产生偏移抵消值，并且 改变收益。 用于放大接收信号的高增益放大部分中的增益设置分两步完成，粗略设置和精确设置。
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公开(公告)号：US20050159148A1
公开(公告)日：2005-07-21
申请号：US11033384
申请日：2005-01-12
IPC分类号： H01Q21/29 , H04B7/08 , H04B7/26 , H04L12/28 , H04M1/00 , H04W16/28 , H04W24/00 , H04W88/02 , H04Q7/20
CPC分类号： H04W24/00 , H01Q21/29 , H04B7/0805 , H04B7/0814 , H04W88/02
摘要： In a radio communication system having a plurality of antennas, a reception-system circuit including variable gain amplification circuits for amplifying a signal received from either of the antennas and a frequency conversion circuit for down-converting the received signal to a signal of a lower frequency, and a signal measuring circuit for detecting intensity of the received signal, whereby a signal received by either of the antennas is selected in accordance with a reception state and amplified and demodulated, change rates with time of a signal which is formed by the signal measuring circuit are determined in respect of either of the signals received by the plurality of antennas and a control signal for selecting a reception antenna is generated in accordance with a differences between the change rates.
摘要翻译： 在具有多个天线的无线电通信系统中，包括用于放大从任一天线接收的信号的可变增益放大电路的接收系统电路和用于将接收信号下变频为较低频率的信号的频率转换电路 以及用于检测接收信号的强度的信号测量电路，由此根据接收状态选择由天线中的任一个接收的信号，并且由信号测量形成的信号随时间变化的放大和解调变化率 根据多个天线接收到的信号之一确定电路，并且根据变化率之间的差异生成用于选择接收天线的控制信号。
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公开(公告)号：US07313125B2
公开(公告)日：2007-12-25
申请号：US10809898
申请日：2004-03-26
CPC分类号： H04L25/061 , H04L27/2657 , H04L27/2675 , H04L27/2679
摘要： The invention comprises: processing for receiving an OFDM packet having a preamble and the following data transmission symbol, in which packet the subcarrier interval of the preamble is set wider than that of the data transmission symbol; processing for estimating a DC offset occurring at a receiving side by using the received preamble; processing for correcting the DC offset on the received data transmission symbol, according to the estimation result of the DC offset; and processing for demodulating the DC offset corrected data transmission symbol. Thus, it is possible to estimate a DC offset and then correct the DC offset according to the estimated value, in the OFDM packet with no nul symbol defined there.
摘要翻译： 本发明包括：接收具有前同步码和后续数据传输符号的OFDM分组的处理，其中前导码的子载波间隔被设置为比数据传输符号的子载波间隔宽; 用于通过使用所接收的前导码来估计在接收侧发生的DC偏移的处理; 根据直流偏移的估计结果对接收到的数据传输符号校正直流偏移的处理; 以及用于解调DC偏移校正数据传输符号的处理。 因此，可以估计DC偏移，然后根据估计值在没有nul符号的OFDM分组中校正DC偏移。
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9.发明授权Semiconductor integrated circuit device, wireless LAN system, and auto gain control system 失效半导体集成电路器件，无线局域网系统和自动增益控制系统公开(公告)号：US07263145B2
公开(公告)日：2007-08-28
申请号：US10617687
申请日：2003-07-14
申请人： Toshihito Habuka , Masaki Noda , Hiroshi Nogami , Toyokazu Hori , Tatsuji Matsuura , Kazuaki Hori , Naoto Inokawa
发明人： Toshihito Habuka , Masaki Noda , Hiroshi Nogami , Toyokazu Hori , Tatsuji Matsuura , Kazuaki Hori , Naoto Inokawa
CPC分类号： H04L25/061 , H03G3/001 , H04B7/0805 , H04B7/0814 , H04B7/0822 , H04L27/2647 , H04L27/3809
摘要： A wireless LAN system has auto gain control with no work load applied to its baseband processing block. When the wireless LAN system gets ready to receive a signal, the gain control circuit switches between the receiving antennas. The gain control circuit sets gain setting value time divisional data according to the level of a received signal to roughly control the gain to be set in the LAN and the gain to be set in two programmable gain amplifiers.
摘要翻译： 无线LAN系统具有自动增益控制，没有工作负载施加到其基带处理块。 当无线LAN系统准备好接收信号时，增益控制电路在接收天线之间切换。 增益控制电路根据接收信号的电平设置增益设定值时分数据，以粗略地控制要在LAN中设置的增益和在两个可编程增益放大器中设置的增益。
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公开(公告)号：US20090258626A1
公开(公告)日：2009-10-15
申请号：US12419355
申请日：2009-04-07
CPC分类号： H03H7/0153 , H03H7/1708 , H03H7/24 , H03H7/425
摘要： A filter circuit includes first capacitors, second capacitors capable of altering a cutoff frequency by being connected in parallel with the first capacitors, first switches for connecting the second capacitors in parallel with the first capacitors, and charging circuits for the second capacitors. The charging circuits include second switches, and resistances for attenuating the amplitudes of input voltages to be fed to the second capacitors, by being connected in series with the second capacitors. The second capacitors are charged through the resistances in a state where the first switches are turned OFF and where the second switches are turned ON. Thus, a DC offset which is ascribable to the cutoff frequency switching of a filter is reduced.
摘要翻译： 滤波器电路包括第一电容器，能够通过与第一电容器并联连接来改变截止频率的第二电容器，用于将第二电容器与第一电容器并联连接的第一开关和用于第二电容器的充电电路。 充电电路包括第二开关和用于衰减要馈送到第二电容器的输入电压的振幅的电阻，通过与第二电容器串联连接。 在第一开关断开的状态和第二开关导通的状态下，通过电阻对第二电容器进行充电。 因此，降低了归因于滤波器的截止频率切换的DC偏移。
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