公开(公告)号：US20070246795A1

公开(公告)日：2007-10-25

申请号：US11409356

申请日：2006-04-20

申请人： Xiaolong Fang ,  Ramakanth Alapati ,  Tuman Allen

发明人： Xiaolong Fang ,  Ramakanth Alapati ,  Tuman Allen

IPC分类号： H01L29/00 ,  H01L21/762

CPC分类号： H01L27/115 ,  H01L21/76229 ,  H01L27/1052 ,  H01L27/11526 ,  H01L27/11543

摘要： Trench isolation structures and methods to form same for use in the manufacture of semiconductor devices are described. The trench isolation structures are formed using several processing schemes that utilize disclosed dry etching processes to form a significant depth A between an array trench depth and a periphery trench depth. One etching method creates a trench delta depth utilizing a single dry etch step, while two other etching methods create a trench A depth by utilizing three dry etch steps.

摘要翻译： 描述了用于制造半导体器件的沟槽隔离结构和形成方法。 使用若干处理方案形成沟槽隔离结构，这些处理方案利用公开的干蚀刻工艺在阵列沟槽深度和外围沟槽深度之间形成显着的深度A. 一种蚀刻方法利用单次干蚀刻步骤产生沟槽三角形深度，而另外两种蚀刻方法通过利用三个干蚀刻步骤产生沟槽A深度。

公开(公告)号：US20060043449A1

公开(公告)日：2006-03-02

申请号：US10932150

申请日：2004-09-01

申请人： Sanh Tang ,  Gordon Haller ,  Kris Brown ,  Tuman Allen

发明人： Sanh Tang ,  Gordon Haller ,  Kris Brown ,  Tuman Allen

IPC分类号： H01L29/94

CPC分类号： H01L29/41758 ,  H01L27/10817 ,  H01L27/10823 ,  H01L27/10876 ,  H01L27/10885 ,  H01L29/1037 ,  H01L29/4236 ,  H01L29/4238 ,  H01L29/66621 ,  H01L29/78

摘要： The invention includes a transistor device having a semiconductor substrate with an upper surface. A pair of source/drain regions are formed within the semiconductor substrate and a channel region is formed within the semiconductor substrate and extends generally perpendicularly relative to the upper surface of the semiconductor substrate. A gate is formed within the semiconductor substrate between the pair of the source/drain regions.

摘要翻译： 本发明包括具有上表面的半导体衬底的晶体管器件。 一对源极/漏极区域形成在半导体衬底内，并且沟道区形成在半导体衬底内并相对于半导体衬底的上表面大致垂直地延伸。 栅极形成在半导体衬底中的一对源/漏区之间。