Data communications receiver operable in highly stressed environments
    1.
    发明授权
    Data communications receiver operable in highly stressed environments 失效
    数据通信接收器可在高度强调的环境中工作

    公开(公告)号:US4706263A

    公开(公告)日:1987-11-10

    申请号:US549701

    申请日:1983-11-07

    IPC分类号: H04L27/227 H04L27/06

    CPC分类号: H04L27/2272

    摘要: A receiver is disclosed for acquiring and tracking a data signal in a highly stressed environment. The receiver comprises first and second I.F. sections, a mixer for translation from the first I.F. frequency to the second I.F. frequency, a 2 KHz bandpass filter at the second I.F. frequency, signal translator for synchronous translation of the signal at the second I.F. frequency to baseband, a digitizer for complex sampling operation on the baseband signal, a microprocessor for processing the digital samples, and a numerically controlled oscillator coupled to the mixer and controlled by the microprocessor. The microprocessor formulates matched digital discrete Fourier Transform filters which drive frequency, phase and symbol lock loops at the symbol rate. Each of the loop filters is formed by symbol-rate recursive, first-order equations. A novel mode control system is employed to implement an orderly transition through the receiver modes, comprising (i) out-of-band noise estimation, (ii) coarse frequency and time acquisition of the data signal employing a sequential probability ratio test and a handover process, (iii) frequency and symbol synchronization with the data signal, (iv) phase and symbol synchronization with the data signal, and (v) feedback loop lock confirmation. After loss of lock, the mode controller transfers the receiver operations back to the appropriate restart operation.

    摘要翻译: 公开了用于在高度应力环境中获取和跟踪数据信号的接收器。 接收机包括第一和第二I.F. 部分,从第一个I.F.翻译的搅拌机 频率到第二个I.F. 频率为2KHz带通滤波器。 频率信号转换器,用于在第二个IF处的信号同步转换。 频率到基带,用于对基带信号进行复杂采样操作的数字转换器,用于处理数字样本的微处理器,以及耦合到混频器并由微处理器控制的数控振荡器。 微处理器制定匹配的数字离散傅里叶变换滤波器,以符号速率驱动频率,相位和符号锁定环路。 每个环路滤波器由符号速率递归的一阶方程组成。 采用新颖的模式控制系统来实现通过接收机模式的有序转换,包括(i)带外噪声估计,(ii)使用连续概率比测试和切换的数据信号的粗略频率和时间获取 过程,(iii)与数据信号的频率和符号同步,(iv)与数据信号的相位和符号同步,以及(v)反馈回路锁定确认。 锁定失败后,模式控制器将接收机操作重新传送回适当的重启操作。

    Method and apparatus for determining communications link quality and
receiver tracking performance
    2.
    发明授权
    Method and apparatus for determining communications link quality and receiver tracking performance 失效
    用于确定通信链路质量和接收机跟踪性能的方法和装置

    公开(公告)号:US4789948A

    公开(公告)日:1988-12-06

    申请号:US775856

    申请日:1985-09-13

    CPC分类号: H04L1/24 H04L1/20 H04L1/0036

    摘要: Apparatus is disclosed for measuring a receiver measurement data set, and a digital processor adapted to determine a derived data set indicative of the communications link quality and dynamic receiver performance, utilizing powerful data reduction algorithms. The invention allows the monitoring of the quality and performance of remote communications links employing a communications receiver, determining the input signal amplitude and noise level, the carrier power to noise power density, the receiver tracking loop phase bias and 1-sigma jitter.

    摘要翻译: 公开了用于测量接收机测量数据集的装置,以及适用于利用强大的数据简化算法来确定指示通信链路质量和动态接收机性能的派生数据集的数字处理器。 本发明允许监测采用通信接收机的远程通信链路的质量和性能,确定输入信号幅度和噪声电平,载波功率噪声功率密度,接收机跟踪环路相位偏置和1-sigma抖动。

    Receiver mode control for acquiring and tracking a signal
    3.
    发明授权
    Receiver mode control for acquiring and tracking a signal 失效
    用于采集和跟踪信号的接收器模式控制

    公开(公告)号:US4689806A

    公开(公告)日:1987-08-25

    申请号:US549696

    申请日:1983-11-07

    摘要: A receiver is disclosed for acquiring and tracking a data signal in a highly stressed environment. The receiver comprises first and second I.F. sections, a mixer for translation from the first I.F. frequency to the second I.F. frequency, a 3 KHz bandpass filter at the second I.F. frequency, signal translator for synchronous translation of the signal at the second I.F. frequency to baseband, a digitizer for complex sampling operation on the baseband signal, a microprocessor for processing the digital samples, and a numerically controlled oscillator coupled to the mixer and controlled by the microprocessor. The microprocessor formulates matched digital discrete Fourier Transform filters which drive frequency, phase and symbol lock loops at the symbol rate. Each of the loop filters is formed by symbol-rate recursive, first-order equations. A novel mode control system is employed to implement an orderly transition through the receiver modes, comprising (i) out-of-band noise estimation, (ii) coarse frequency and time acquisition of the data signal employing a sequential probability ratio test and a handover process, (iii) frequency and symbol synchronization with the data signal, (iv) phase and symbol synchronization with the data signal, and (v) feedback loop lock confirmation. After loss of lock, the mode controller transfers the receiver operations back to the appropriate restart operation.

    摘要翻译: 公开了用于在高度应力环境中获取和跟踪数据信号的接收器。 接收机包括第一和第二I.F. 部分,从第一个I.F.翻译的搅拌机 频率到第二个I.F. 频率为3KHz带通滤波器。 频率信号转换器,用于在第二个IF处的信号同步转换。 频率到基带,用于对基带信号进行复杂采样操作的数字转换器,用于处理数字样本的微处理器,以及耦合到混频器并由微处理器控制的数控振荡器。 微处理器制定匹配的数字离散傅里叶变换滤波器,以符号速率驱动频率,相位和符号锁定环路。 每个环路滤波器由符号速率递归的一阶方程组成。 采用新颖的模式控制系统来实现通过接收机模式的有序转换,包括(i)带外噪声估计,(ii)使用连续概率比测试和切换的数据信号的粗略频率和时间获取 过程,(iii)与数据信号的频率和符号同步,(iv)与数据信号的相位和符号同步,以及(v)反馈回路锁定确认。 锁定失败后,模式控制器将接收机操作重新传送回适当的重启操作。

    Lock detector for feedback loops
    5.
    发明授权
    Lock detector for feedback loops 失效
    锁定检测器用于反馈回路

    公开(公告)号:US4860321A

    公开(公告)日:1989-08-22

    申请号:US775909

    申请日:1985-09-13

    IPC分类号: H04L25/06 H04L27/227

    CPC分类号: H04L25/067 H04L27/2272

    摘要: A receiver is disclosed for acquiring and tracking a data signal in a highly stressed environment. The receiver comprises first and second I.F. sections, a mixer for translation from the first I.F. frequency to the second I.F. frequency, a 2 kHz bandpass filter at the second I.F. frequency, signal translator for synchronous translation of the signal at the second I.F. frequency to baseband, a digitizer for complex sampling operation on the baseband signal, a microprocessor for processing the digital samples, and a numerically controlled oscillator coupled to the mixer and controlled by the microprocessor. The microprocessor formulates matched digital discrete Fourier transform filters which drive frequency, phase and symbol lock loops at the symbol rate. Each of the loop filters is formed by symbol-rate recursive, first-order equations. A novel mode control system is employed to implement an orderly transition through the receiver modes, comprising (i) out-of-band noise estimation, (ii) coarse frequency and time acquisition of the data signal employing a sequential probability ratio test and a handover process, (iii) frequency and symbol synchronization with the data signal, (iv) phase and symbol synchronization with the data signal, and (v) feedback loop lock confirmation. After loss of lock, the mode controller transfers the receiver operations back to the appropriate restart operation. The receiver includes a novel lock detector system adapted to determine whether the feedback loops are properly locked to the signal. The system is operable over the range of frequency and time offsets and over a wide variation in received carrier-to-noise power densities.

    摘要翻译: 公开了用于在高度应力环境中获取和跟踪数据信号的接收器。 接收机包括第一和第二I.F. 部分,从第一个I.F.翻译的搅拌机 频率到第二个I.F. 频率,第二个I.F的2 kHz带通滤波器。 频率信号转换器,用于在第二个IF处的信号同步转换。 频率到基带,用于对基带信号进行复杂采样操作的数字转换器,用于处理数字样本的微处理器,以及耦合到混频器并由微处理器控制的数控振荡器。 微处理器制定匹配的数字离散傅立叶变换滤波器,以符号速率驱动频率,相位和符号锁定环路。 每个环路滤波器由符号速率递归的一阶方程组成。 采用新颖的模式控制系统来实现通过接收机模式的有序转换,包括(i)带外噪声估计,(ii)使用连续概率比测试和切换的数据信号的粗略频率和时间获取 过程,(iii)与数据信号的频率和符号同步,(iv)与数据信号的相位和符号同步,以及(v)反馈回路锁定确认。 锁定失败后,模式控制器将接收机操作重新传送回适当的重启操作。 该接收机包括适于确定反馈回路是否被适当锁定到该信号的新型锁定检测器系统。 该系统可在频率和时间偏移的范围内以及在接收的载波噪声功率密度的广泛变化中操作。