METHOD FOR DECODING NON-BINARY CODES AND CORRESPONDING DECODING APPARATUS
    6.
    发明申请
    METHOD FOR DECODING NON-BINARY CODES AND CORRESPONDING DECODING APPARATUS 审中-公开
    用于解码非二进制码和相关解码设备的方法

    公开(公告)号:US20170012642A1

    公开(公告)日:2017-01-12

    申请号:US15116291

    申请日:2015-02-03

    IPC分类号: H03M13/11

    CPC分类号: H03M13/1108 H03M13/1171

    摘要: An extension to the enhanced serial generalized bit-flipping decoding algorithm (ES-GBFDA) of non-binary LDPC codes by introducing soft information in the check node operation. The application not only considers the most reliable symbol in the syndrome computation, but also takes at least the second most reliable symbol of each incoming message into account. An extended information set is available for the parity-check node update and this allows introducing the concept of weak and strong votes performed by the check node unit. Each variable node can receive two kinds of votes, whose amplitudes can be tuned to the reliability of the syndrome that produces the vote.

    摘要翻译: 通过在校验节点操作中引入软信息来扩展非二进制LDPC码的增强型串行通用位翻转解码算法(ES-GBFDA)。 应用程序不仅考虑了校正子计算中最可靠的符号,而且还考虑了每个传入消息的至少第二最可靠的符号。 扩展信息集可用于奇偶校验节点更新,这允许引入由校验节点单元执行的弱和强的投票的概念。 每个变量节点可以接收两种投票,其幅度可以调整到产生投票的综合征的可靠性。

    PHOTONIC CHIP, FIELD PROGRAMMABLE PHOTONIC ARRAY AND PHOTONIC INTEGRATED CIRCUIT

    公开(公告)号:US20220413222A1

    公开(公告)日:2022-12-29

    申请号:US17612782

    申请日:2020-05-11

    IPC分类号: G02B6/293

    摘要: The present invention relates to a photonic chip carried out by the combination and interconnection of equally-oriented Programmable Photonics Processing Blocks, with all their longitudinal axes in parallel, implemented over a photonic chip that is capable of implementing one or multiple, simultaneous photonics circuits with optical feedback paths and/or linear multiport transformations, by the appropriate programming of its resources and the selection of its input and output ports. The invention also relates to a parallel field-programmable photonic array (P-FPPA) comprising of, at least one programmable circuit based on equally-oriented/parallel tunable beam-splitters with independent coupling and phase-shifting configuration and peripheral high-performance building blocks.