公开(公告)号：US20080150650A1

公开(公告)日：2008-06-26

申请号：US11642133

申请日：2006-12-20

申请人： Vijaya B. Rentala ,  Baher Haroun ,  Bo Xia

发明人： Vijaya B. Rentala ,  Baher Haroun ,  Bo Xia

IPC分类号： H03H7/38

CPC分类号： H03H11/30 ,  H04N5/148

摘要： A video driver includes a current-to-voltage converter circuit that converts an analog input current to a corresponding analog voltage. Active termination circuitry is configured to synthesize an output impedance at an output thereof that substantially matches a load impedance to which the output is coupled, the active termination circuitry buffering the analog voltage to the output.

摘要翻译： 视频驱动器包括将模拟输入电流转换为对应的模拟电压的电流 - 电压转换器电路。 有源终端电路被配置为在其输出处合成输出阻抗，其基本上匹配输出耦合到的负载阻抗，有源终端电路将模拟电压缓冲到输出。

公开(公告)号：US07764210B2

公开(公告)日：2010-07-27

申请号：US11642133

申请日：2006-12-20

申请人： Vijaya B. Rentala ,  Baher Haroun ,  Bo Xia

发明人： Vijaya B. Rentala ,  Baher Haroun ,  Bo Xia

IPC分类号： H03M1/66

CPC分类号： H03H11/30 ,  H04N5/148

摘要： A video driver includes a current-to-voltage converter circuit that converts an analog input current to a corresponding analog voltage. Active termination circuitry is configured to synthesize an output impedance at an output thereof that substantially matches a load impedance to which the output is coupled, the active termination circuitry buffering the analog voltage to the output.

摘要翻译： 视频驱动器包括将模拟输入电流转换为对应的模拟电压的电流 - 电压转换器电路。 有源终端电路被配置为在其输出处合成输出阻抗，其基本上匹配输出耦合到的负载阻抗，有源终端电路将模拟电压缓冲到输出。

公开(公告)号：US07586357B2

公开(公告)日：2009-09-08

申请号：US11653037

申请日：2007-01-12

申请人： Vijaya B. Rentala ,  Baher Haroun

发明人： Vijaya B. Rentala ,  Baher Haroun

IPC分类号： H03K5/08

CPC分类号： H03H11/24

摘要： A system for providing a desired substantially constant resistance includes a first transistor interconnected between a first node and a second node. The system also includes a second transistor, the second transistor being diode connected, the first transistor and the second transistor forming a current mirror. A voltage divider is coupled to provide a portion of a voltage associated with the first transistor to the second transistor, the voltage divider being configured parallel to the first transistor to provide a substantially constant resistance between the first node and the second node. A current source is coupled to the second transistor, the current source being controlled to draw an amount of current through the second transistor to set the substantially constant resistance substantially equal to the desired substantially constant resistance.

摘要翻译： 用于提供期望的基本上恒定的电阻的系统包括在第一节点和第二节点之间互连的第一晶体管。 该系统还包括第二晶体管，第二晶体管被二极管连接，第一晶体管和第二晶体管形成电流镜。 耦合分压器以将与第一晶体管相关联的电压的一部分提供给第二晶体管，该分压器被配置成与第一晶体管并联，以在第一节点和第二节点之间提供基本恒定的电阻。 电流源耦合到第二晶体管，电流源被控制以画出通过第二晶体管的电流量，以将基本上恒定的电阻设置为基本上等于期望的基本上恒定的电阻。

公开(公告)号：US20080169794A1

公开(公告)日：2008-07-17

申请号：US11653037

申请日：2007-01-12

申请人： Vijaya B. Rentala ,  Baher Haroun

发明人： Vijaya B. Rentala ,  Baher Haroun

IPC分类号： H03H11/46 ,  H03H11/00 ,  G05F1/46

CPC分类号： H03H11/24

摘要： A system for providing a desired substantially constant resistance includes a first transistor interconnected between a first node and a second node. The system also includes a second transistor, the second transistor being diode connected, the first transistor and the second transistor forming a current mirror. A voltage divider is coupled to provide a portion of a voltage associated with the first transistor to the second transistor, the voltage divider being configured parallel to the first transistor to provide a substantially constant resistance between the first node and the second node. A current source is coupled to the second transistor, the current source being controlled to draw an amount of current through the second transistor to set the substantially constant resistance substantially equal to the desired substantially constant resistance.

摘要翻译： 用于提供期望的基本上恒定的电阻的系统包括在第一节点和第二节点之间互连的第一晶体管。 该系统还包括第二晶体管，第二晶体管被二极管连接，第一晶体管和第二晶体管形成电流镜。 耦合分压器以将与第一晶体管相关联的电压的一部分提供给第二晶体管，该分压器被配置成与第一晶体管并联，以在第一节点和第二节点之间提供基本恒定的电阻。 电流源耦合到第二晶体管，电流源被控制以画出通过第二晶体管的电流量，以将基本上恒定的电阻设置为基本上等于期望的基本上恒定的电阻。

公开(公告)号：US07129875B1

公开(公告)日：2006-10-31

申请号：US11178191

申请日：2005-07-08

申请人： Oguz Altun ,  Vijaya B. Rentala ,  Gabriel J. Gomez ,  Baher S. Haroun

发明人： Oguz Altun ,  Vijaya B. Rentala ,  Gabriel J. Gomez ,  Baher S. Haroun

IPC分类号： H03M3/00

CPC分类号： H03M3/322 ,  H03M3/43 ,  H03M3/454

摘要： An analog-to-digital (A/D) converter system is provided that compensates for operating variations associated with one or more passive components of the A/D converter. In one aspect of the present invention, the A/D converter system comprises a sigma delta modulator having at least one passive component and a feedback path that includes at least one switched digital-to-analog converter (DAC), and a tracking reference generator that provides compensated reference signals to the at least one switched DAC for providing feedback to the sigma delta modulator. The compensated reference signals include inverse variations that cancel operating variations associated with the at least one passive component.

摘要翻译： 提供了一种模数（A / D）转换器系统，其补偿与A / D转换器的一个或多个无源部件相关联的操作变化。 在本发明的一个方面，A / D转换器系统包括具有至少一个无源部件和包括至少一个开关数模转换器（DAC）的反馈路径的Σ-Δ调制器和跟踪参考发生器 其向所述至少一个开关DAC提供补偿参考信号，以向Σ-Δ调制器提供反馈。 补偿的参考信号包括抵消与至少一个无源部件相关联的操作变化的逆变化。