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公开(公告)号：US12088326B2
公开(公告)日：2024-09-10
申请号：US17940236
申请日：2022-09-08
发明人： Ankur Bal , Abhishek Jain
CPC分类号： H03M3/464 , H03K3/356 , H03M1/0626 , H03M3/43
摘要： A continuous time, sigma-delta analog-to-digital converter circuit includes a sigma-delta modulator circuit configured to receive an analog input signal. A single bit quantizer of the modulator generates a digital output signal at a sampling frequency. A data storage circuit stores bits of the digital output signal and digital-to-analog converter (DAC) elements are actuated in response to the stored bits to generate an analog feedback signal for comparison to the analog input signal. A filter circuit includes polyphase signal processing paths and a summation circuit configured to sum outputs from the polyphase signal processing paths to generate a converted output signal. A fan out circuit selectively applies the stored bits from the data storage circuit to inputs of the polyphase signal processing paths of the filter circuit.
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公开(公告)号：US20240113719A1
公开(公告)日：2024-04-04
申请号：US18529134
申请日：2023-12-05
申请人： SIGMASENSE, LLC.
发明人： Phuong Huynh
CPC分类号： H03M1/0626 , H03M1/1245 , H03M1/462 , H03M1/464 , H03M1/84 , H03M3/32 , H03M3/43 , H03M3/462 , H03M3/476
摘要： An analog to digital converter (ADC) senses an analog signal (e.g., a load current) to generate a digital signal. The ADC operates based on a load voltage produced based on charging of an element (e.g., a capacitor) by a load current and a digital to analog converter (DAC) output current (e.g., from a N-bit DAC). The ADC generates a digital output signal representative of a difference between the load voltage and a reference voltage. This digital output signal is used directly, or after digital signal processing, to operate an N-bit DAC to generate a DAC output current that tracks the load current. The digital output signal provided to the N-bit DAC is an inverse function of the load current. The ADC is operative to sense very low currents (e.g., currents as low as is of pico-amps) and consume very little power (e.g., less than 2 μW).
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公开(公告)号：US20240007126A1
公开(公告)日：2024-01-04
申请号：US18452458
申请日：2023-08-18
申请人： Wacom Co., Ltd.
发明人： Takeshi KOIKE
摘要： A delta-sigma modulation circuit is enabled to be used to detect a pen signal. An integrated circuit according to the present disclosure is a sensor controller that detects pen signals transmitted from an active pen. The integrated circuit includes a delta-sigma modulation circuit including a subtractor that subtracts a feedback signal from a received signal input from a sensor, an integrator that integrates an output signal of the subtractor, a quantizer that quantizes an output signal of the integrator, and a digital analog converter that generates the feedback signal based on an output value of the quantizer. The integrated circuit also has a processor that detects a level of the received signal based on an output value of the delta-sigma modulation circuit, and a gain controller that a level of the feedback signal based on the level of the received signal detected by the processor.
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公开(公告)号：US20190215005A1
公开(公告)日：2019-07-11
申请号：US16265363
申请日：2019-02-01
申请人： Alexei V. Nikitin
发明人： Alexei V. Nikitin
摘要： Method and apparatus for nonlinear signal processing include mitigation of outlier noise in the process of analog-to-digital conversion and adaptive real-time signal conditioning, processing, analysis, quantification, comparison, and control. Methods, processes and apparatus for real-time measuring and analysis of variables include statistical analysis and generic measurement systems and processes which are not specially adapted for any specific variables, or to one particular environment. Methods and corresponding apparatus for mitigation of electromagnetic interference, for improving properties of electronic devices, and for improving and/or enabling coexistence of a plurality of electronic devices include post-processing analysis of measured variables and post-processing statistical analysis.
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公开(公告)号：US20190116420A1
公开(公告)日：2019-04-18
申请号：US16218615
申请日：2018-12-13
发明人： Mohit CHAWLA
CPC分类号： H04R3/007 , H03F3/187 , H03F3/2171 , H03F3/2173 , H03F3/2175 , H03F3/45475 , H03F2200/03 , H03F2200/405 , H03F2203/45116 , H03F2203/45546 , H03F2203/45594 , H03M3/43 , H03M3/45 , H03M3/452 , H03M3/464 , H04R29/001
摘要： A class-D amplifier includes measurement of speaker current via the low-side drive transistors of the amplifier. In one embodiment, a class-D amplifier includes two high-side transistors, two low-side transistors, a first sense resistor, a second sense resistor, and a sigma delta analog to digital converter (ΣΔ ADC). The two high-side transistors and two low-side transistors are connected as a bridge to drive a bridge tied speaker. The first sense resistor is connected between a first of the low-side transistors and a low-side reference voltage. The second sense resistor is connected between a second of the low-side transistors and the low-side reference voltage. The ΣΔ ADC is coupled to the bridge to measure voltage across the first sense resistor and the second sense resistor.
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公开(公告)号：US20180313699A1
公开(公告)日：2018-11-01
申请号：US15957999
申请日：2018-04-20
摘要： A circuit includes a first input terminal, a second input terminal, a third input terminal and an output terminal. A first summation node adds signals at the first and third input terminals. A second summation node subtracts signals at the second and third input terminals. A selector selects between the added signals and subtracted signals in response to a selection signal. The output of the selector is integrated to generate an integrated signal. The integrated signal is compared by a comparator to a threshold, the comparator generating an output signal at the output terminal having a first level and a second level. Feedback of the output signal produces the selection signal causing the selector to select the added signals in response to the first level of the output signal and causing the selector to select the subtracted signals in response to the second level of the output signal.
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公开(公告)号：US10024729B2
公开(公告)日：2018-07-17
申请号：US15178363
申请日：2016-06-09
发明人： Saurabh Kumar Singh
摘要： A temperature sensor is disclosed. In one aspect, the temperature sensor provides a digital output having a precise degree/code step. For example, each step in the digital output code may correspond to one degree Celsius. In one aspect, a temperature sensor comprises a precision band-gap circuit and a sigma delta modulator (SDM) analog-to-digital convertor (ADC). A bandgap voltage and a PTAT voltage may be provided from the band-gap circuit as an input to the SDM ADC. The SDM ADC may produce an output based on the difference between the PTAT voltage and the bandgap voltage. The temperature sensor may also have logic that outputs a temperature code based on the output of the SDM ADC.
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公开(公告)号：US20180115321A1
公开(公告)日：2018-04-26
申请号：US15716252
申请日：2017-09-26
发明人： Michael Kropfitsch , Massimo Rigo
IPC分类号： H03M3/00
摘要： A sigma delta analog to digital converter for converting an analog input into a digital output comprises a reference path for receiving a reference voltage. The reference path comprises a digital to analog converter. The digital to analog converter comprises a reference voltage input for receiving the reference voltage, wherein the reference voltage input comprises two contacts and wherein each contact is a beginning of a voltage line of two voltage lines. The digital to analog converter comprises a plurality of switches and a plurality of capacitors. The switches of the plurality of switches are configured to connect the digital to analog converter in a sampling phase with the reference voltage and to disconnect the digital to analog converter in an integrating phase from the reference voltage.
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公开(公告)号：US09787291B1
公开(公告)日：2017-10-10
申请号：US15385527
申请日：2016-12-20
CPC分类号： H03H19/004 , H03M3/43 , H03M3/456 , H03M3/464
摘要： In accordance with an embodiment, a method of operating a switched capacitor circuit includes pre-charging a capacitor using a voltage buffer having an input coupled to an input node of the switched capacitor circuit and an output coupled to the capacitor, coupling the input node to the capacitor, wherein a first charge is collected on the capacitor, and integrating the first charge using an integrator.
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10.发明申请公开(公告)号：US20170276484A1
公开(公告)日：2017-09-28
申请号：US15465216
申请日：2017-03-21
IPC分类号： G01C19/5776 , H03M3/00
CPC分类号： G01C19/5776 , H03M3/402 , H03M3/422 , H03M3/43 , H03M3/458
摘要： The present invention relates to a method for adjusting the resonance frequency of a loop filter in a delta-sigma modulator, e.g. in an angular rate sensor, to a predetermined frequency value, wherein the sigma-delta modulator comprises an input terminal, which is connected to the loop filter, a quantizer, which is connected to an output of the loop filter, and a feedback branch, which couples an output of the quantizer back to the input terminal. The method comprises the following steps: Optional rough adjustment of the resonance frequency of the filter by means of the regulating variable of a second oscillator, input of a filter input signal of the loop filter into a frequency adjustment circuit, determination of a noise spectrum of the filter input signal in a first frequency band and a second frequency band, wherein the first frequency band and the second frequency band are arranged symmetrically around the predetermined frequency, comparison of the noise spectra and creation of an adjustment signal that leads to a frequency adjustment when the noise spectra deviate from one another, and feedback of the adjustment signal of the frequency adjustment circuit to a control input of the loop filter for setting the filter frequency in response to the comparative result.
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