Method of forming finned semiconductor devices with trench isolation
    1.
    发明授权
    Method of forming finned semiconductor devices with trench isolation 有权
    形成具有沟槽隔离的鳍状半导体器件的方法

    公开(公告)号:US08431466B2

    公开(公告)日:2013-04-30

    申请号:US13176614

    申请日:2011-07-05

    IPC分类号: H01L21/76

    摘要: A method of manufacturing a semiconductor device structure, such as a FinFET device structure, is provided. The method begins by providing a substrate comprising a bulk semiconductor material, a first conductive fin structure formed from the bulk semiconductor material, and a second conductive fin structure formed from the bulk semiconductor material. The first conductive fin structure and the second conductive fin structure are separated by a gap. Next, spacers are formed in the gap and adjacent to the first conductive fin structure and the second conductive fin structure. Thereafter, an etching step etches the bulk semiconductor material, using the spacers as an etch mask, to form an isolation trench in the bulk semiconductor material. A dielectric material is formed in the isolation trench, over the spacers, over the first conductive fin structure, and over the second conductive fin structure. Thereafter, at least a portion of the dielectric material and at least a portion of the spacers are etched away to expose an upper section of the first conductive fin structure and an upper section of the second conductive fin structure, while preserving the dielectric material in the isolation trench. Following these steps, the fabrication of the devices is completed in a conventional manner.

    摘要翻译: 提供了诸如FinFET器件结构的半导体器件结构的制造方法。 该方法开始于提供包括体半导体材料的衬底,由体半导体材料形成的第一导电鳍结构以及由体半导体材料形成的第二导电鳍结构。 第一导电鳍结构和第二导电鳍结构被间隙分开。 接下来,间隔件形成在间隙中并且与第一导电翅片结构和第二导电翅片结构相邻。 此后,蚀刻步骤使用间隔物作为蚀刻掩模来蚀刻体半导体材料,以在体半导体材料中形成隔离沟槽。 绝缘材料形成在隔离沟槽中,在间隔物之上,在第一导电鳍结构之上,并在第二导电鳍结构之上。 此后,介电材料的至少一部分和至少一部分间隔物被蚀刻掉以露出第一导电鳍结构的上部和第二导电翅片结构的上部,同时将介电材料保留在 隔离沟 按照这些步骤,以常规方式完成装置的制造。

    METHOD OF FORMING FINNED SEMICONDUCTOR DEVICES WITH TRENCH ISOLATION
    2.
    发明申请
    METHOD OF FORMING FINNED SEMICONDUCTOR DEVICES WITH TRENCH ISOLATION 有权
    形成具有热分解的微结构半导体器件的方法

    公开(公告)号:US20110263094A1

    公开(公告)日:2011-10-27

    申请号:US13176614

    申请日:2011-07-05

    IPC分类号: H01L21/76

    摘要: A method of manufacturing a semiconductor device structure, such as a FinFET device structure, is provided. The method begins by providing a substrate comprising a bulk semiconductor material, a first conductive fin structure formed from the bulk semiconductor material, and a second conductive fin structure formed from the bulk semiconductor material. The first conductive fin structure and the second conductive fin structure are separated by a gap. Next, spacers are formed in the gap and adjacent to the first conductive fin structure and the second conductive fin structure. Thereafter, an etching step etches the bulk semiconductor material, using the spacers as an etch mask, to form an isolation trench in the bulk semiconductor material. A dielectric material is formed in the isolation trench, over the spacers, over the first conductive fin structure, and over the second conductive fin structure. Thereafter, at least a portion of the dielectric material and at least a portion of the spacers are etched away to expose an upper section of the first conductive fin structure and an upper section of the second conductive fin structure, while preserving the dielectric material in the isolation trench. Following these steps, the fabrication of the devices is completed in a conventional manner.

    摘要翻译: 提供了诸如FinFET器件结构的半导体器件结构的制造方法。 该方法开始于提供包括体半导体材料的衬底,由体半导体材料形成的第一导电鳍结构以及由体半导体材料形成的第二导电鳍结构。 第一导电鳍结构和第二导电鳍结构被间隙分开。 接下来,间隔件形成在间隙中并且与第一导电翅片结构和第二导电翅片结构相邻。 此后,蚀刻步骤使用间隔物作为蚀刻掩模来蚀刻体半导体材料,以在体半导体材料中形成隔离沟槽。 绝缘材料形成在隔离沟槽中,在间隔物之上,在第一导电鳍结构之上,并在第二导电鳍结构之上。 此后,介电材料的至少一部分和至少一部分间隔物被蚀刻掉以露出第一导电鳍结构的上部和第二导电翅片结构的上部,同时将介电材料保留在 隔离沟 按照这些步骤,以常规方式完成装置的制造。

    METHOD OF FORMING FINNED SEMICONDUCTOR DEVICES WITH TRENCH ISOLATION
    3.
    发明申请
    METHOD OF FORMING FINNED SEMICONDUCTOR DEVICES WITH TRENCH ISOLATION 有权
    形成具有热分解的微结构半导体器件的方法

    公开(公告)号:US20100015778A1

    公开(公告)日:2010-01-21

    申请号:US12176866

    申请日:2008-07-21

    IPC分类号: H01L21/76

    摘要: A method of manufacturing a semiconductor device structure, such as a FinFET device structure, is provided. The method begins by providing a substrate comprising a bulk semiconductor material, a first conductive fin structure formed from the bulk semiconductor material, and a second conductive fin structure formed from the bulk semiconductor material. The first conductive fin structure and the second conductive fin structure are separated by a gap. Next, spacers are formed in the gap and adjacent to the first conductive fin structure and the second conductive fin structure. Thereafter, an etching step etches the bulk semiconductor material, using the spacers as an etch mask, to form an isolation trench in the bulk semiconductor material. A dielectric material is formed in the isolation trench, over the spacers, over the first conductive fin structure, and over the second conductive fin structure. Thereafter, at least a portion of the dielectric material and at least a portion of the spacers are etched away to expose an upper section of the first conductive fin structure and an upper section of the second conductive fin structure, while preserving the dielectric material in the isolation trench. Following these steps, the fabrication of the devices is completed in a conventional manner.

    摘要翻译: 提供了诸如FinFET器件结构的半导体器件结构的制造方法。 该方法开始于提供包括体半导体材料的衬底,由体半导体材料形成的第一导电鳍结构以及由体半导体材料形成的第二导电鳍结构。 第一导电鳍结构和第二导电鳍结构被间隙分开。 接下来,间隔件形成在间隙中并且与第一导电翅片结构和第二导电翅片结构相邻。 此后,蚀刻步骤使用间隔物作为蚀刻掩模来蚀刻体半导体材料,以在体半导体材料中形成隔离沟槽。 绝缘材料形成在隔离沟槽中,在间隔物之上,在第一导电鳍结构之上,并在第二导电鳍结构之上。 此后,介电材料的至少一部分和至少一部分间隔物被蚀刻掉以露出第一导电鳍结构的上部和第二导电翅片结构的上部,同时将介电材料保留在 隔离沟 按照这些步骤,以常规方式完成装置的制造。

    Method of forming finned semiconductor devices with trench isolation
    4.
    发明授权
    Method of forming finned semiconductor devices with trench isolation 有权
    形成具有沟槽隔离的鳍状半导体器件的方法

    公开(公告)号:US07994020B2

    公开(公告)日:2011-08-09

    申请号:US12176866

    申请日:2008-07-21

    IPC分类号: H01L21/76

    摘要: A method of manufacturing a semiconductor device structure, such as a FinFET device structure, is provided. The method begins by providing a substrate comprising a bulk semiconductor material, a first conductive fin structure formed from the bulk semiconductor material, and a second conductive fin structure formed from the bulk semiconductor material. The first conductive fin structure and the second conductive fin structure are separated by a gap. Next, spacers are formed in the gap and adjacent to the first conductive fin structure and the second conductive fin structure. Thereafter, an etching step etches the bulk semiconductor material, using the spacers as an etch mask, to form an isolation trench in the bulk semiconductor material. A dielectric material is formed in the isolation trench, over the spacers, over the first conductive fin structure, and over the second conductive fin structure. Thereafter, at least a portion of the dielectric material and at least a portion of the spacers are etched away to expose an upper section of the first conductive fin structure and an upper section of the second conductive fin structure, while preserving the dielectric material in the isolation trench. Following these steps, the fabrication of the devices is completed in a conventional manner.

    摘要翻译: 提供了诸如FinFET器件结构的半导体器件结构的制造方法。 该方法开始于提供包括体半导体材料的衬底,由体半导体材料形成的第一导电鳍结构以及由体半导体材料形成的第二导电鳍结构。 第一导电鳍结构和第二导电鳍结构被间隙分开。 接下来,间隔件形成在间隙中并且与第一导电翅片结构和第二导电翅片结构相邻。 此后,蚀刻步骤使用间隔物作为蚀刻掩模来蚀刻体半导体材料,以在体半导体材料中形成隔离沟槽。 绝缘材料形成在隔离沟槽中,在间隔物之上,在第一导电鳍结构之上,并在第二导电鳍结构之上。 此后,介电材料的至少一部分和至少一部分间隔物被蚀刻掉以露出第一导电鳍结构的上部和第二导电翅片结构的上部,同时将介电材料保留在 隔离沟 按照这些步骤,以常规方式完成装置的制造。