Voltage drop aware circuit placement
    1.
    发明授权
    Voltage drop aware circuit placement 有权
    电压降感知电路放置

    公开(公告)号:US08327305B1

    公开(公告)日:2012-12-04

    申请号:US12534053

    申请日:2009-07-31

    IPC分类号: G06F17/50

    CPC分类号: G06F17/5072

    摘要: A circuit and methods for placing a circuit block on an integrated circuit (IC) are disclosed. An embodiment of the disclosed method includes dividing the IC into multiple regions based on pre-determined value. This pre-determined value may be a voltage drop value measured on specific regions on the IC. The performance requirement for the circuit block is determined and placed in one of the regions on the IC. In one embodiment, the placement of the circuit block is based on the performance requirement and the measured value at specific regions on the IC. The measured value may be a voltage drop value and a circuit block with a higher performance may be placed in a region with a lower voltage drop value.

    摘要翻译: 公开了一种将电路块放置在集成电路(IC)上的电路和方法。 所公开方法的实施例包括基于预定值将IC划分成多个区域。 该预定值可以是在IC上的特定区域上测量的电压降值。 电路块的性能要求被确定并放置在IC的一个区域中。 在一个实施例中,电路块的放置基于IC上的特定区域的性能要求和测量值。 测量值可以是电压降值,并且具有较高性能的电路块可以放置在具有较低电压降值的区域中。