公开(公告)号：US10010031B1

公开(公告)日：2018-07-03

申请号：US15605919

申请日：2017-05-25

申请人： Xue Wu Liu ,  Tian Li David Liu ,  Rui Li

发明人： Xue Wu Liu ,  Tian Li David Liu ,  Rui Li

IPC分类号： A01G25/06 ,  A01G25/16 ,  A01G29/00 ,  G06K19/06

CPC分类号： A01G25/06 ,  A01G25/16 ,  A01G27/006 ,  A01G29/00 ,  G06K19/06028

摘要： A multifunctional underground irrigation system comprises of an underground irrigation, fertilization and respiration (UIFR) device with three types of air/pressure releasing structures, an universal unique label and label reader, three irrigation monitoring indicators, various sample collecting channels and measurement devices, a movable monitoring device, a water supply system, and a data center. The water containers, water drip controlling device, water flow rate controlling device, AAB device and AWPAE devices constitute the irrigation device for field plants or potted plants culture. The combination of the wireless technologies with various sensors in one of three indicators enables the underground irrigation to be visible, hearable, viewable and remotely controllable at real time and real-location manner for precision management of plant cultivation. The movable device provides a way to monitor the water supply system and to calibrate data obtained from UIFR devices. All devices in the system are repairable and replaceable.

公开(公告)号：US20170003005A1

公开(公告)日：2017-01-05

申请号：US14790221

申请日：2015-07-02

申请人： Yao Wu Liu ,  Kuo Chih Chen

发明人： Yao Wu Liu ,  Kuo Chih Chen

IPC分类号： F21V21/00

CPC分类号： F21V21/00 ,  F21S4/10 ,  F21V19/0015 ,  F21Y2115/10 ,  H01R33/09 ,  H01R33/97 ,  H01R2103/00

摘要： A lamp holder for an LED lamp string includes a base and an LED luminaire. The LED luminaire is inserted into the base. The base includes a casing, a cover, and a tail plug which are axially symmetric structures. The combination of the casing, cover and tail plug form a pin insertion hole of the LED luminaire and a wire inserting hole of a connecting wire of the lamp string, and the three are combined as a whole by a latch member, a latch slot, and a latch member. The cover and the tail plug seal an electrically conductive portion of the LED luminaire to provide a waterproof and dustproof effect. Since the casing, cover and tail plug are bilaterally symmetric structures, the level of difficulty of the alignment is reduced significantly. Automated equipment may be used for assembling the base in mass production, and the labor is reduced significantly.

摘要翻译： 用于LED灯串的灯座包括基座和LED灯具。 LED灯具插入底座。 底座包括轴向对称结构的壳体，盖子和尾塞。 壳体，盖和尾塞的组合形成LED灯具的销插入孔和灯串的连接线的导线插入孔，并且三个组合体通过闩锁构件，闩锁槽， 和闩锁构件。 盖和尾塞密封LED灯具的导电部分，以提供防水和防尘效果。 由于套管，盖和尾塞是双边对称的结构，所以对准的难度级别显着降低。 自动化设备可用于批量生产中的基地组装，劳动力明显减少。

公开(公告)号：US09534769B1

公开(公告)日：2017-01-03

申请号：US14790221

申请日：2015-07-02

申请人： Yao Wu Liu ,  Kuo Chih Chen

发明人： Yao Wu Liu ,  Kuo Chih Chen

IPC分类号： H01R33/00 ,  F21V21/00 ,  F21Y101/02

CPC分类号： F21V21/00 ,  F21S4/10 ,  F21V19/0015 ,  F21Y2115/10 ,  H01R33/09 ,  H01R33/97 ,  H01R2103/00

摘要： A lamp holder for an LED lamp string includes a base and an LED luminaire. The LED luminaire is inserted into the base. The base includes a casing, a cover, and a tail plug which are axially symmetric structures. The combination of the casing, cover and tail plug form a pin insertion hole of the LED luminaire and a wire inserting hole of a connecting wire of the lamp string, and the three are combined as a whole by a latch member, a latch slot, and a latch member. The cover and the tail plug seal an electrically conductive portion of the LED luminaire to provide a waterproof and dustproof effect. Since the casing, cover and tail plug are bilaterally symmetric structures, the level of difficulty of the alignment is reduced significantly. Automated equipment may be used for assembling the base in mass production, and the labor is reduced significantly.

摘要翻译： 用于LED灯串的灯座包括基座和LED灯具。 LED灯具插入底座。 底座包括轴向对称结构的壳体，盖子和尾塞。 壳体，盖和尾塞的组合形成LED灯具的销插入孔和灯串的连接线的导线插入孔，并且三个组合体通过闩锁构件，闩锁槽， 和闩锁构件。 盖和尾塞密封LED灯具的导电部分，以提供防水和防尘效果。 由于套管，盖和尾塞是双边对称的结构，所以对准的难度级别显着降低。 自动化设备可用于批量生产中的基地组装，劳动力明显减少。

公开(公告)号：US20130118009A1

公开(公告)日：2013-05-16

申请号：US13658780

申请日：2012-10-23

申请人： RUI-WU LIU

发明人： RUI-WU LIU

IPC分类号： H05K3/30

CPC分类号： H05K3/4038 ,  H05K3/06 ,  H05K2203/0323 ,  H05K2203/1572 ,  Y10T29/49146

摘要： A method for manufacturing a printed circuit board includes the following steps. First, a first copper foil having first and second surfaces is provided. Second, the first copper foil is etched to remove portions of the first copper foil to convert the first copper foil into an intermediate structure having a substrate and first protrusions. Each first protrusion is exposed at the first surface. Third, a first insulation material fills into gaps between the first protrusions. Fourth, a second copper foil is laminated on the first surface. Fifth, the intermediate structure is etched from the second surface to remove portions of substrate to convert the substrate into second protrusions. Sixth, a second insulation material is infilled into gaps between the second protrusions. Seventh, a third copper foil is laminated on the second surface. Finally, the copper foils are patterned to be second and third patterns.

摘要翻译： 印刷电路板的制造方法包括以下步骤。 首先，提供具有第一和第二表面的第一铜箔。 其次，蚀刻第一铜箔以去除第一铜箔的部分，以将第一铜箔转换为具有基板和第一突起的中间结构。 每个第一突起在第一表面处露出。 第三，第一绝缘材料填充在第一突起之间的间隙中。 第四，在第一表面层叠第二铜箔。 第五，从第二表面蚀刻中间结构以去除衬底的部分，以将衬底转换成第二突起。 第六，第二绝缘材料填充到第二突起之间的间隙中。 第七，在第二表面上层叠第三铜箔。 最后，将铜箔图案化为第二和第三图案。

公开(公告)号：US20130075766A1

公开(公告)日：2013-03-28

申请号：US13448359

申请日：2012-04-16

申请人： Che-Chia Chang ,  Sheng-Chao Liu ,  Wu-Liu Tsai ,  Chuan-Sheng Wei ,  Chih-Hung Lin

发明人： Che-Chia Chang ,  Sheng-Chao Liu ,  Wu-Liu Tsai ,  Chuan-Sheng Wei ,  Chih-Hung Lin

IPC分类号： H01L27/15 ,  H01L27/105

CPC分类号： G02F1/136213 ,  G02F1/136286 ,  G09G3/3677 ,  G09G2310/0286 ,  H01L27/1255

摘要： A thin film transistor device, disposed on a substrate, includes a gate electrode, a semiconductor channel layer, a gate insulating layer disposed between the gate electrode and the semiconductor channel layer, a source electrode and a drain electrode disposed at two opposite sides of the semiconductor channel layer and partially overlapping the semiconductor channel layer, respectively, a capacitor electrode at least partially overlapping the gate electrode, and a capacitor dielectric layer disposed between the capacitor electrode and the gate electrode. The capacitor electrode, the gate electrode and the capacitor dielectric layer form a capacitor device.

摘要翻译： 设置在基板上的薄膜晶体管器件包括栅电极，半导体沟道层，设置在栅电极和半导体沟道层之间的栅极绝缘层，设置在栅极电极和半导体沟道层的两相对侧的源电极和漏电极 半导体沟道层和半导体沟道层的部分重叠，至少部分地与栅电极重叠的电容器电极和设置在电容器电极和栅电极之间的电容器电介质层。 电容器电极，栅极电极和电容器介电层形成电容器器件。

公开(公告)号：US06764200B1

公开(公告)日：2004-07-20

申请号：US10342230

申请日：2003-01-15

申请人： Hsiang Lan Wu Liu

发明人： Hsiang Lan Wu Liu

IPC分类号： F21V106

CPC分类号： B44C5/005 ,  A47G33/0836 ,  F21S4/10 ,  F21S4/20 ,  F21V21/088 ,  F21W2121/00

摘要： A decorative lantern includes a plurality of constituent pieces made of a light-transmissible, heat-resisting, and flexible plastic material. Each of the constituent pieces has a radially inner zone at a first side thereof, and a radially outer zone at a second side thereof, and is formed at a radially inner edge with at least one recess portion. The constituent pieces are sequentially connected together by bonding the radially inner zone at the first side of a first constituent piece to a second constituent piece adjacent to the first side of the first constituent piece, and bonding the radially outer zone at the second side of the first constituent piece to a third constituent piece adjacent to the second side of the first constituent piece; and the recess portions of all the constituent pieces together define a receiving space in the decorative lantern for accommodating an electrically conductive light source therein.

摘要翻译： 装饰灯包括由透光，耐热和柔性塑料材料制成的多个组成件。 每个组成件在其第一侧具有径向内部区域，在其第二侧具有径向外部区域，并且在径向内部边缘处形成有至少一个凹部。 通过将第一构件的第一侧的径向内部区域与第一构件的第一侧相邻的第二构成件接合，将构成片连接在一起，并且将第二构造件的第二侧的径向外部区域 第一构件与第一构件的第二侧相邻的第三构件; 所有构成件的凹部一起在装饰灯中形成容纳导电光源的容纳空间。

公开(公告)号：US5850359A

公开(公告)日：1998-12-15

申请号：US740379

申请日：1996-10-29

申请人： Pin-Wu Liu

发明人： Pin-Wu Liu

IPC分类号： G11C7/06 ,  G11C11/419 ,  G11C11/00

CPC分类号： G11C7/065 ,  G11C11/419

摘要： Bit lines coupled to a column of SRAM core cells in an array are sensed asynchronously using zero DC power with either differential sense amplifiers or single-ended amplifiers, according to the present invention. The differential sense amplifier embodiment includes a pair of cross-coupled series-connected PMOS and NMOS transistors connected between the power supplies. Each bit line is coupled to an NMOS gate in the transistor pair, and each PMOS gate is coupled to the drain-source connection of the other series-connected PMOS-NMOS pair. The PMOS gates and PMOS-NMOS drain-source connections define the sense amplifier complementary output signals, whose states are determined by the bit line states. The single-ended embodiment is implemented as a PMOS-NMOS transistor pair inverter connected between the power supplies. Each inverter input is coupled to a bit line, and the inverter outputs are the sense amplifier outputs. In both embodiments, series-connected PMOS-NMOS pairs do not provide any DC path and function asynchronously without clock or enabling signals other than the bit line signals. In either embodiment, a zero DC power consumption bit-line clamp implemented as a PMOS-NMOS inverter is also coupled to each bit line, and is controlled by the associated sense amplifier output signal. The bit-line clamp forces an associated bit line to a full "1" or "0" logic state.

摘要翻译： 根据本发明，耦合到阵列中的SRAM核心单元的列的位线与使用差分读出放大器或单端放大器的零直流电力异步地感测。 差分读出放大器实施例包括连接在电源之间的一对交叉耦合的串联连接的PMOS和NMOS晶体管。 每个位线耦合到晶体管对中的NMOS栅极，并且每个PMOS栅极耦合到另一个串联连接的PMOS-NMOS对的漏极 - 源极连接。 PMOS栅极和PMOS-NMOS漏极 - 源极连接定义读出放大器互补输出信号，其状态由位线状态决定。 单端实施例被实现为连接在电源之间的PMOS-NMOS晶体管对反相器。 每个逆变器输入端与位线相连，变频器输出为读出放大器输出。 在两个实施例中，串联连接的PMOS-NMOS对不提供任何DC路径和异步功能，而不需要时钟或使能除位线信号之外的信号。 在任一实施例中，实现为PMOS-NMOS反相器的零直流功率消耗位线钳位还耦合到每个位线，并且由相关的读出放大器输出信号控制。 位线钳位将相关位线强制为完全“1”或“0”逻辑状态。

公开(公告)号：US5473562A

公开(公告)日：1995-12-05

申请号：US286292

申请日：1994-08-05

申请人： Pin-Wu Liu

发明人： Pin-Wu Liu

IPC分类号： G11C7/10 ,  G11C7/00

CPC分类号： G11C7/1069 ,  G11C7/1051 ,  G11C7/1078

摘要： A retargetable SRAM system includes several block storage units that include a plurality of addressably selectable SRAM core cells, with a block single ended bit line driver coupleable to the output of each block storage unit to enhance voltage slew rate. To promote retargetability, digital (rather than analog) sense amplifiers are provided per each data output port. To minimize power-up crowbar current, the input of each unselected block bit line driver is forced to a "1" or "0" state. AMOS transistor coupled between the input port of each block bit line driver and an upper or lower system power supply has its gate input lead coupled to receive the system block select signal (or its complement). A desired SRAM core cell is accessed by specifying its row, column, and block address. A row select signal causes the cell output to be coupled to the input of the associated block bit line driver. The block select signal, its complement, and column select signal cause the output of the associated block bit line driver to be coupled to the input of the digital sense amplifier for the specified data output. The same block select signal (or its complement) turns on the MOS transistor coupled to the input node of each unselected block bit line driver. In a system with SRAM core cells arrayed into 128 rows and 256 columns, partitioned into four block storage units of 32 rows each, crowbar current is thus minimized for the 3.times.256 or 768 unselected block bit line drivers.

摘要翻译： 可重定向SRAM系统包括几个块存储单元，其包括多个可寻址的可选择的SRAM核心单元，其具有可耦合到每个块存储单元的输出的块单端位线驱动器，以增强电压转换速率。 为了提高可重定向性，每个数据输出端口提供数字（而不是模拟）读出放大器。 为了最小化上电撬棒电流，每个未选择的块位线驱动器的输入被强制为“1”或“0”状态。 耦合在每个块位线驱动器的输入端口和上或下系统电源之间的AMOS晶体管的栅极输入引线被耦合以接收系统块选择信号（或其补码）。 通过指定其行，列和块地址来访问所需的SRAM核心单元。 行选择信号使单元输出耦合到相关块位线驱动器的输入端。 块选择信号，其补码和列选择信号使得相关联的块位线驱动器的输出被耦合到用于指定数据输出的数字读出放大器的输入端。 相同的块选择信号（或其补码）接通耦合到每个未选择的块位线驱动器的输入节点的MOS晶体管。 在具有排列成128行和256列的SRAM核心单元的系统中，将其划分为每行32行的四个存储单元，因此3x256或768未选择的块位线驱动器的撬棒电流最小化。

公开(公告)号：US08786815B2

公开(公告)日：2014-07-22

申请号：US13330627

申请日：2011-12-19

申请人： Chih-Hung Lin ,  Wu-Liu Tsai ,  Chuan-Sheng Wei ,  Che-Chia Chang ,  Sheng-Chao Liu ,  Yu-Cheng Chen ,  Yi-Hui Li ,  Maw-Song Chen

发明人： Chih-Hung Lin ,  Wu-Liu Tsai ,  Chuan-Sheng Wei ,  Che-Chia Chang ,  Sheng-Chao Liu ,  Yu-Cheng Chen ,  Yi-Hui Li ,  Maw-Song Chen

IPC分类号： G02F1/133 ,  G02F1/1368

CPC分类号： G02F1/133707 ,  G02F1/136213 ,  G02F2201/40

摘要： A display panel having a display region and a non-display region is provided. The display panel includes a plurality of pixel structures in the display region, and each pixel structure includes a scan line, a data line, a first active device, a pixel electrode, a first insulating layer, a capacitor electrode, and a second insulating layer. The first active device includes a first gate, a first channel, a first source, and a first drain. The second insulating layer covers the first insulating layer and the capacitor electrode and is located between the capacitor electrode and the first drain. At least one driving circuit is disposed in the non-display region and includes at least one second active device. Hence, a relatively thin insulating layer can be disposed between the capacitor electrode and the drain to reduce the area of the capacitor region and to achieve a desired aperture ratio.

摘要翻译： 提供具有显示区域和非显示区域的显示面板。 显示面板包括显示区域中的多个像素结构，并且每个像素结构包括扫描线，数据线，第一有源器件，像素电极，第一绝缘层，电容器电极和第二绝缘层 。 第一有源器件包括第一栅极，第一沟道，第一源极和第一漏极。 第二绝缘层覆盖第一绝缘层和电容器电极，并且位于电容器电极和第一漏极之间。 至少一个驱动电路设置在非显示区域中并且包括至少一个第二有源器件。 因此，可以在电容器电极和漏极之间设置相对薄的绝缘层，以减小电容器区域的面积并实现所需的孔径比。

公开(公告)号：US20130217020A1

公开(公告)日：2013-08-22

申请号：US13402779

申请日：2012-02-22

申请人： Li-Hui Chow ,  Tsang-Wu Liu

发明人： Li-Hui Chow ,  Tsang-Wu Liu

IPC分类号： C12Q1/68

CPC分类号： C12Q1/6827 ,  C12Q2535/131 ,  C12Q2537/143

摘要： A method of diagnosing a KRAS gene mutation at codons 12-13 in a DNA sample is disclosed. The method comprises detecting one or more than one mutation in the KRAS gene codons 12-13 of the DNA sample by performing an allelic discrimination assay using a mutant probe, a wild-type probe paired with the mutant probe, a forward primer and a reverse primer, the mutant probe being adapted to detect a single nucleotide mutation at 1A, 1T, 1C, 2A, 2T, 2C or 5A of the KRAS gene codons 12-13 of the DNA sample, and the primers each having no greater than 25 nucleotides in length are adapted to amplify a region spanning KRAS exon 2 codons 12-13, wherein the mutant and wild-type probes are labeled with different fluorescent dyes.

摘要翻译： 公开了一种在DNA样品中诊断密码子12-13的KRAS基因突变的方法。 该方法包括通过使用突变型探针，与突变型探针配对的野生型探针，正向引物和反向引物来检测DNA样品的KRAS基因密码子12-13中的一个或多于一个突变 引物，所述突变探针适于检测DNA样品的KRAS基因密码子12-13的1A，1T，1C，2A，2T，2C或5A的单核苷酸突变，并且每个不大于25个核苷酸的引物 其长度适于扩增跨越KRAS外显子2密码子12-13的区域，其中突变体和野生型探针用不同的荧光染料标记。