公开(公告)号：US20240341033A1

公开(公告)日：2024-10-10

申请号：US18625662

申请日：2024-04-03

申请人： IBIDEN CO., LTD.

发明人： Masashi KUWABARA ,  Susumu KAGOHASHI

IPC分类号： H05K1/11 ,  H05K3/40

CPC分类号： H05K1/115 ,  H05K3/4038 ,  H05K2201/0245 ,  H05K2201/096 ,  H05K2201/09827 ,  H05K2201/09845 ,  H05K2203/06

摘要： A wiring substrate includes a first build-up part including first insulating and conductor layers, and via conductors, and a second build-up part including second insulating and conductor layers. The first build-up part is laminated on the second build-up part. The minimum wiring width of wirings in the first conductor layers is smaller than the minimum wiring width of wirings in the second conductor layers. The minimum inter-wiring distance of the wirings in the first conductor layers is smaller than the minimum inter-wiring distance of the wirings in the second conductor layers. The first conductor layers and via conductors include a first layer and a second layer. The first layer of each via conductor is covering inner wall surface in a via opening and has a first portion and a second portion. The first portion has a portion formed closer to the center of the via opening than the second portion.

公开(公告)号：US20240284608A1

公开(公告)日：2024-08-22

申请号：US18611934

申请日：2024-03-21

申请人： HongQiSheng Precision Electronics (QinHuangDao) Co., Ltd. ,  Avary Holding (Shenzhen) Co., Limited. ,  Garuda Technology Co., Ltd.

发明人： Gang Yuan ,  Xiao-Juan Zhang

IPC分类号： H05K5/00 ,  H05K1/05 ,  H05K1/11 ,  H05K3/00 ,  H05K3/40

CPC分类号： H05K5/0069 ,  H05K1/056 ,  H05K1/112 ,  H05K1/115 ,  H05K3/0094 ,  H05K3/4038 ,  H05K2201/09563 ,  H05K2201/10128 ,  H05K2203/0323

摘要： A circuit board includes an inner wiring substrate and a first side plate. The inner wiring substrate includes a plurality of first connection pads at a side. The first side plate is disposed on the inner wiring substrate and defines a plurality of first holes exposing the first connection pads. Each first hole includes a first end facing the first connection pad and a second end facing away from the first connection pad. A central distance between two adjacent first connection pads is greater than a center distance between two second ends of two adjacent first holes. The first holes are filled with first conductive bodies, each first conductive body is electrically connected to the first connection pad and extends out of the first hole to form a connection portion. A method for manufacturing the circuit board and a display module are also disclosed.

公开(公告)号：US20240268038A1

公开(公告)日：2024-08-08

申请号：US18434888

申请日：2024-02-07

申请人： IBIDEN CO., LTD.

发明人： Susumu KAGOHASHI ,  Jun SAKAI ,  Kyohei YOSHIKAWA

IPC分类号： H05K3/46 ,  H05K1/03 ,  H05K1/09 ,  H05K3/40 ,  H05K3/42

CPC分类号： H05K3/4688 ,  H05K1/0306 ,  H05K1/0353 ,  H05K1/09 ,  H05K3/4038 ,  H05K3/423 ,  H05K2201/0209 ,  H05K2201/0212 ,  H05K2201/0323 ,  H05K2201/0326

摘要： A printed wiring board includes a first conductor layer, a resin insulating layer including glass particles and resin, a second conductor layer formed on a surface of the resin insulating layer and including a seed layer and an electrolytic plating layer, and a via conductor connecting the first conductor layer and second conductor layer and including the seed layer and electrolytic plating layer extending from the second conductor layer. The second conductor layer and the via conductor are formed such that the second conductor layer includes signal wirings and that the seed layer is formed by sputtering an alloy including copper, aluminum, and one or more metals selected from nickel, zinc, gallium, silicon, and magnesium, and the resin insulating layer is formed such that the surface of the resin insulating layer includes the resin and that an inner wall surface in the opening includes the resin and the glass particles.

公开(公告)号：US12022616B2

公开(公告)日：2024-06-25

申请号：US18200230

申请日：2023-05-22

申请人： Shenzhen Newsonic Technologies Co., Ltd.

发明人： Guojun Weng ,  Xiaolong Wang

IPC分类号： H05K1/14 ,  H01L21/56 ,  H01L23/00 ,  H01L23/538 ,  H01L25/00 ,  H01L25/065 ,  H05K1/11 ,  H05K3/34 ,  H05K3/40

CPC分类号： H05K1/144 ,  H01L21/568 ,  H01L23/5384 ,  H01L24/16 ,  H01L25/0655 ,  H01L25/50 ,  H05K1/115 ,  H05K3/34 ,  H05K3/4038 ,  H01L2224/16227 ,  H01L2224/16238 ,  H05K2201/042 ,  H05K2201/09036 ,  H05K2201/09509 ,  H05K2201/10098 ,  H05K2201/10674 ,  H05K2201/10984

摘要： A radio frequency front-end module, a manufacturing method thereof and a communication device are provided. The radio frequency front-end module includes a first base substrate and a metal bonding structure; a second functional substrate, including a second base substrate, a groove in the second base substrate, and a bonding metal layer; and a first radio frequency front-end component, at least partially located in the groove, the first base substrate and the second base substrate are oppositely arranged, and a surface of the second base substrate close to the first base substrate includes a groove surface inside the groove and a substrate surface outside the groove, and the bonding metal layer includes a first metal portion located on the groove surface and a second metal portion located on the substrate surface, the first radio frequency front-end component is at least partially surrounded by the first metal portion.

公开(公告)号：US20240138076A1

公开(公告)日：2024-04-25

申请号：US18489884

申请日：2023-10-18

申请人： IBIDEN CO., LTD.

发明人： Ikuya TERAUCHI

IPC分类号： H05K3/40 ,  H05K3/00

CPC分类号： H05K3/4038 ,  H05K3/0055 ,  H05K3/4007 ,  H05K2203/107

摘要： A method for manufacturing a wiring substrate includes forming first conductor pads and second conductor pads having a shorter inter-pad distance than the first conductor pads, forming a second insulating layer covering the first conductor pads and the second conductor pads, forming first via holes exposing the first conductor pads, applying a first desmear treatment such that residues are removed from the first via holes, forming second via holes in the second insulating layer after the first desmear treatment such that the second via holes expose the second conductor pads, applying a second desmear treatment such that residues are removed from the second via holes, forming first via conductors in the first via holes such that the first via conductors are formed on the first conductor pads, and forming second via conductors in the second via holes such that the second via conductor are formed on the second conductor pads.

公开(公告)号：US20240098898A1

公开(公告)日：2024-03-21

申请号：US17949732

申请日：2022-09-21

申请人： Hewlett Packard Enterprise Development LP

发明人： Melvin Kent Benedict ,  Chi Kim Sides ,  Paul Danna ,  Michael Chan

IPC分类号： H05K1/11 ,  H05K3/40

CPC分类号： H05K1/115 ,  H05K3/4038 ,  H05K2201/09545 ,  H05K2203/0207

摘要： One aspect provides a printed circuit board (PCB). The PCB can include a plurality of layers and a plurality of plated through-hole (PTH) vias extending through the plurality of layers. The plurality of layers can include at least a top layer for mounting components, a second surface layer, and a first power layer positioned between the top layer and the second surface layer. The plurality of PTH vias can include at least one power via coupled to the first power layer to provide power to components mounted on the top layer. A stub length of the power via can be less than a distance between the power layer and the second surface layer.

公开(公告)号：US11864327B2

公开(公告)日：2024-01-02

申请号：US17006305

申请日：2020-08-28

申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION

发明人： Gerald Bartley ,  Darryl Becker ,  Matthew Doyle ,  Mark Jeanson

IPC分类号： H01F27/28 ,  H05K3/30 ,  H01F41/04 ,  H01F17/00 ,  G03F7/00 ,  G02B6/46 ,  H01B1/02 ,  H01F27/06 ,  H01G2/06 ,  H05K1/11 ,  H05K1/18 ,  H05K3/40 ,  G03F1/62

CPC分类号： H05K3/301 ,  G02B6/46 ,  G03F7/70733 ,  H01B1/02 ,  H01F17/0013 ,  H01F17/0033 ,  H01F27/06 ,  H01F27/2804 ,  H01F41/042 ,  H01F41/046 ,  H01G2/06 ,  H05K1/115 ,  H05K1/184 ,  H05K3/4038 ,  G03F1/62 ,  H01F2017/002 ,  H01F2017/004 ,  H01F2027/065

摘要： An inductor structure is provided that is positioned within a via of a printed circuit board. The inductor structure includes a via extending through a printed circuit board. The inductor structure includes at least one coil of an electrically conductive material beginning at a first opening to the via continuously present on a sidewall of the via encircling a center of the via extending to a second opening of the via opposite the first opening of the via. It further includes at least electrode present in contact with an end of the coil at said first or second opening.

公开(公告)号：US20230354503A1

公开(公告)日：2023-11-02

申请号：US18344652

申请日：2023-06-29

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

发明人： Jiun-Yi WU ,  Chien-Hsun LEE ,  Chewn-Pu JOU ,  Fu-Lung HSUEH

IPC分类号： H05K1/02 ,  H01L21/768 ,  H01L21/48 ,  H01L23/498 ,  H01L23/552 ,  H05K1/11 ,  H05K3/00 ,  H05K3/40 ,  H05K3/42

CPC分类号： H05K1/0216 ,  H05K1/024 ,  H01L21/76805 ,  H05K1/0222 ,  H01L21/485 ,  H01L21/486 ,  H01L23/49827 ,  H01L23/552 ,  H05K1/113 ,  H05K1/115 ,  H05K3/0047 ,  H05K3/4007 ,  H05K3/423 ,  H05K1/0245 ,  H05K3/42 ,  H05K2201/0959 ,  Y10T29/49165 ,  H05K3/4038 ,  H05K2201/0723 ,  H05K2201/09545 ,  H05K2201/09645

摘要： An interconnect structure includes a dielectric block, a first conductive plug, a second conductive plug, a substrate, a first conductive line, and a second conductive line. The first conductive plug and the second conductive plug are surrounded by the dielectric block. The substrate surrounds the dielectric block. The first conductive line is connected to the first conductive plug and is in contact with a top surface of the dielectric block. The second conductive line is connected to the second conductive plug.

公开(公告)号：US11737205B2

公开(公告)日：2023-08-22

申请号：US17884418

申请日：2022-08-09

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

发明人： Jiun-Yi Wu ,  Chien-Hsun Lee ,  Chewn-Pu Jou ,  Fu-Lung Hsueh

IPC分类号： H01L23/552 ,  H05K3/42 ,  H05K1/02 ,  H01L21/768 ,  H01L21/48 ,  H01L23/498 ,  H05K1/11 ,  H05K3/00 ,  H05K3/40

CPC分类号： H05K1/0216 ,  H01L21/485 ,  H01L21/486 ,  H01L21/76805 ,  H01L23/49827 ,  H01L23/552 ,  H05K1/024 ,  H05K1/0222 ,  H05K1/113 ,  H05K1/115 ,  H05K3/0047 ,  H05K3/4007 ,  H05K3/423 ,  H05K1/0245 ,  H05K3/4038 ,  H05K3/42 ,  H05K2201/0723 ,  H05K2201/0959 ,  H05K2201/09545 ,  H05K2201/09645 ,  Y10T29/49165

摘要： An interconnect structure includes a first conductor, a second conductor, a dielectric block, a substrate, and a pair of conductive lines. The first conductor and the second conductor form a differential pair design. The dielectric block surrounds the first conductor and the second conductor. The first conductor is separated from the second conductor by the dielectric block. The substrate surrounds the dielectric block and is spaced apart from the first conductor and the second conductor. The pair of conductive lines is connected to the first conductor and the second conductor, respectively, and extends along a top surface of the dielectric block and a top surface of the substrate.

公开(公告)号：US20230262893A1

公开(公告)日：2023-08-17

申请号：US17894128

申请日：2022-08-23

申请人： Unimicron Technology Corp.

发明人： Chih-Chiang Lu ,  Jun-Rui Huang ,  Ming-Hao Wu ,  Yi-Pin Lin ,  Tung-Chang Lin

IPC分类号： H05K1/11 ,  H05K3/46 ,  H05K3/00 ,  H05K1/02 ,  H05K3/40

CPC分类号： H05K1/116 ,  H05K3/4644 ,  H05K3/0094 ,  H05K1/024 ,  H05K3/4038 ,  H05K2201/0187

摘要： A circuit board, including a first dielectric material, a second dielectric material, a third dielectric material, a fourth dielectric material, a first external circuit layer, a second external circuit layer, a conductive structure, a first conductive via, and multiple second conductive vias, is provided. The first conductive via at least passes through the first dielectric material and the fourth dielectric material, and is electrically connected to the first external circuit layer and the second external circuit layer to define a signal path. The second conductive vias pass through the first dielectric material, the second dielectric material, the third dielectric material, and a part of the conductive structure, and surround the first conductive via. The second conductive vias are electrically connected to the first external circuit layer, the conductive structure, and the second external circuit layer to define a ground path, and the ground path surrounds the signal path.