Floor mat
    1.
    外观设计

    公开(公告)号:USD953066S1

    公开(公告)日:2022-05-31

    申请号:US29727829

    申请日:2020-03-13

    Applicant: Xiaopeng Yu

    Designer: Xiaopeng Yu

    HOSTLESS PARKING RADAR SYSTEM AND CONTROL METHOD

    公开(公告)号:US20190041504A1

    公开(公告)日:2019-02-07

    申请号:US16074709

    申请日:2017-01-25

    Applicant: Xiaopeng YU

    Inventor: Xiaopeng YU

    Abstract: Disclosed are a hostless parking radar system and a control method. The parking radar system comprises a plurality of sensors (1a-1d), wherein each sensor unit can be independently used as a master sensor to coordinate other sensors as slave sensors, and controls the working time sequence of each slave sensor; and each sensor unit is independent in connection with and in communication with a vehicle bus module (3) and/or a buzzer (4). The plurality of sensors is provided with the same structure, and each sensor can be used as the master sensor, so that the functional completeness and the reliability of the parking radar system are ensured.

    METHODS FOR FABRICATING TUNNELING OXIDE LAYER AND FLASH MEMORY DEVICE
    3.
    发明申请
    METHODS FOR FABRICATING TUNNELING OXIDE LAYER AND FLASH MEMORY DEVICE 审中-公开
    用于制造隧道氧化物层和闪存存储器件的方法

    公开(公告)号:US20080318382A1

    公开(公告)日:2008-12-25

    申请号:US11956005

    申请日:2007-12-13

    CPC classification number: H01L29/66825 H01L29/40114

    Abstract: A method for manufacturing a tunneling oxide layer including the following steps: forming a tunneling oxide layer on a semiconductor substrate by in-situ steam generation oxidation; performing a annealing on the tunneling oxide layer. There is also provided a method for manufacturing a flash memory device. According to the invention, the dangling bonds between silicon oxide in a tunneling oxide layer and silicon adjacent to a semiconductor substrate interface are terminated by performing a annealing on a tunneling oxide layer, thereby improving the erase rate of the tunneling oxide layer.

    Abstract translation: 一种隧道氧化层的制造方法,包括以下步骤:通过原位蒸汽发生氧化在半导体基板上形成隧道氧化物层; 对隧道氧化物层进行退火。 还提供了一种用于制造闪存装置的方法。 根据本发明,通过对隧道氧化物层进行退火来终止隧道氧化物层中的氧化硅与与半导体衬底界面相邻的硅之间的悬挂键,从而提高隧道氧化物层的擦除速率。

    Method and system for forming a controllable gate oxide
    4.
    发明授权
    Method and system for forming a controllable gate oxide 有权
    用于形成可控栅极氧化物的方法和系统

    公开(公告)号:US07851383B2

    公开(公告)日:2010-12-14

    申请号:US12052640

    申请日:2008-03-20

    CPC classification number: H01L21/28202 H01L29/513 H01L29/518 H01L29/78

    Abstract: Method and system for forming gate structure with controllable oxide. The method includes a step for providing a semiconductor substrate and defining a source region and a drain region within the semiconductor substrate. Furthermore, the method includes a step for defining a gate region positioned between the source region and the drain region. Moreover, the method provides a step for forming a first layer overlaying the gate region. The first layer includes silicon nitride and/or silicon oxynitride material. Also, the method includes a step for forming a second layer by subjecting the semiconductor substrate to at least oxygen at a predetermined temperature range for a period of time. The second layer has a thickness less than 20 Angstroms.

    Abstract translation: 用可控氧化物形成栅极结构的方法和系统 该方法包括提供半导体衬底并限定半导体衬底内的源极区和漏极区的步骤。 此外,该方法包括用于限定位于源极区域和漏极区域之间的栅极区域的步骤。 此外,该方法提供了形成覆盖栅极区域的第一层的步骤。 第一层包括氮化硅和/或氮氧化硅材料。 此外,该方法包括通过使半导体衬底至少在预定温度范围内的氧持续一段时间来形成第二层的步骤。 第二层的厚度小于20埃。

    Method and System for Forming a Controllable Gate Oxide
    5.
    发明申请
    Method and System for Forming a Controllable Gate Oxide 有权
    形成可控栅极氧化物的方法和系统

    公开(公告)号:US20080233692A1

    公开(公告)日:2008-09-25

    申请号:US12052640

    申请日:2008-03-20

    CPC classification number: H01L21/28202 H01L29/513 H01L29/518 H01L29/78

    Abstract: Method and system for forming gate structure with controllable oxide. The method includes a step for providing a semiconductor substrate and defining a source region and a drain region within the semiconductor substrate. Furthermore, the method includes a step for defining a gate region positioned between the source region and the drain region. Moreover, the method provides a step for forming a first layer overlaying the gate region. The first layer includes silicon nitride and/or silicon oxynitride material. Also, the method includes a step for forming a second layer by subjecting the semiconductor substrate to at least oxygen at a predetermined temperature range for a period of time. The second layer has a thickness less than 20 Angstroms.

    Abstract translation: 用可控制的氧化物形成栅极结构的方法和系统。 该方法包括提供半导体衬底并限定半导体衬底内的源极区域和漏极区域的步骤。 此外,该方法包括用于限定位于源极区域和漏极区域之间的栅极区域的步骤。 此外,该方法提供了形成覆盖栅极区域的第一层的步骤。 第一层包括氮化硅和/或氮氧化硅材料。 此外,该方法包括通过使半导体衬底至少在预定温度范围内的氧持续一段时间来形成第二层的步骤。 第二层的厚度小于20埃。

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