Abstract:
Disclosed are a hostless parking radar system and a control method. The parking radar system comprises a plurality of sensors (1a-1d), wherein each sensor unit can be independently used as a master sensor to coordinate other sensors as slave sensors, and controls the working time sequence of each slave sensor; and each sensor unit is independent in connection with and in communication with a vehicle bus module (3) and/or a buzzer (4). The plurality of sensors is provided with the same structure, and each sensor can be used as the master sensor, so that the functional completeness and the reliability of the parking radar system are ensured.
Abstract:
A method for manufacturing a tunneling oxide layer including the following steps: forming a tunneling oxide layer on a semiconductor substrate by in-situ steam generation oxidation; performing a annealing on the tunneling oxide layer. There is also provided a method for manufacturing a flash memory device. According to the invention, the dangling bonds between silicon oxide in a tunneling oxide layer and silicon adjacent to a semiconductor substrate interface are terminated by performing a annealing on a tunneling oxide layer, thereby improving the erase rate of the tunneling oxide layer.
Abstract:
Method and system for forming gate structure with controllable oxide. The method includes a step for providing a semiconductor substrate and defining a source region and a drain region within the semiconductor substrate. Furthermore, the method includes a step for defining a gate region positioned between the source region and the drain region. Moreover, the method provides a step for forming a first layer overlaying the gate region. The first layer includes silicon nitride and/or silicon oxynitride material. Also, the method includes a step for forming a second layer by subjecting the semiconductor substrate to at least oxygen at a predetermined temperature range for a period of time. The second layer has a thickness less than 20 Angstroms.
Abstract:
Method and system for forming gate structure with controllable oxide. The method includes a step for providing a semiconductor substrate and defining a source region and a drain region within the semiconductor substrate. Furthermore, the method includes a step for defining a gate region positioned between the source region and the drain region. Moreover, the method provides a step for forming a first layer overlaying the gate region. The first layer includes silicon nitride and/or silicon oxynitride material. Also, the method includes a step for forming a second layer by subjecting the semiconductor substrate to at least oxygen at a predetermined temperature range for a period of time. The second layer has a thickness less than 20 Angstroms.