公开(公告)号：US06813703B2

公开(公告)日：2004-11-02

申请号：US10350127

申请日：2003-01-24

申请人： Hiroaki Nishikawa ,  Yasuhiro Wabiko ,  Ryosuke Kurebayashi ,  Shinya Ito

发明人： Hiroaki Nishikawa ,  Yasuhiro Wabiko ,  Ryosuke Kurebayashi ,  Shinya Ito

IPC分类号： G06F9455

CPC分类号： G06F9/455 ,  G06F9/4494

摘要： An emulation system for data-driven processors aims at shortening the emulation time by employing parallel processing techniques without increasing overhead. The emulation system emulates virtual data-driven processors by using real data-driven processors. The emulation is performed by dividing the functionality of the processor into a data path and a timing path. In the data path emulation, each virtual packet to be processed in the virtual processor is expressed as a PACKET message, and the processing operation of the virtual packet is evaluated for each functional block. In the timing path emulation, a SEND signal and an ACK signal, to be controlled by a self-timed transfer control mechanism and a gate logic, are expressed as a SEND message and an ACK message, respectively, and stage-to-stage transfer operations of the SEND signal and the ACK signal are evaluated.

摘要翻译： 用于数据驱动处理器的仿真系统旨在通过采用并行处理技术来缩短仿真时间，而不会增加开销。 仿真系统通过使用真正的数据驱动处理器来模拟虚拟数据驱动处理器。 通过将处理器的功能划分为数据路径和定时路径来执行仿真。 在数据路径仿真中，在虚拟处理器中要处理的每个虚拟分组被表示为PACKET消息，并且为每个功能块评估虚拟分组的处理操作。 在定时路径仿真中，要由自定时传输控制机制和门逻辑控制的SEND信号和ACK信号分别表示为SEND消息和ACK消息，并且分阶段传送 评估SEND信号和ACK信号的操作。