公开(公告)号：US20130069713A1

公开(公告)日：2013-03-21

申请号：US13558763

申请日：2012-07-26

申请人： Yuichiro MIWA ,  Masahiro Kitamura

发明人： Yuichiro MIWA ,  Masahiro Kitamura

IPC分类号： G05F3/02

CPC分类号： G05F3/02 ,  G06F1/263 ,  Y10T307/305 ,  Y10T307/391 ,  Y10T307/615 ,  Y10T307/724

摘要： A microcomputer includes a first switch coupled between a main power supply terminal and a power supply node, and a second switch coupled between an auxiliary power supply terminal and the power supply node. The microcomputer compares a voltage V1 of the main power supply terminal with a reference voltage VR1. When V1>VR1, the microcomputer turns on the first switch and turns off the second switch, and when V1

摘要翻译： 微型计算机包括耦合在主电源端子和电源节点之间的第一开关以及耦合在辅助电源端子和电源节点之间的第二开关。 微型计算机将主电源端子的电压V1与参考电压VR1进行比较。 当V1> VR1时，微型电脑打开第一个开关并关闭第二个开关，当V1

公开(公告)号：US08653884B2

公开(公告)日：2014-02-18

申请号：US13558763

申请日：2012-07-26

申请人： Yuichiro Miwa ,  Masahiro Kitamura

发明人： Yuichiro Miwa ,  Masahiro Kitamura

IPC分类号： G05F1/10

CPC分类号： G05F3/02 ,  G06F1/263 ,  Y10T307/305 ,  Y10T307/391 ,  Y10T307/615 ,  Y10T307/724

摘要： A microcomputer includes a first switch coupled between a main power supply terminal and a power supply node, and a second switch coupled between an auxiliary power supply terminal and the power supply node. The microcomputer compares a voltage V1 of the main power supply terminal with a reference voltage VR1. When V1>VR1, the microcomputer turns on the first switch and turns off the second switch, and when V1

摘要翻译： 微型计算机包括耦合在主电源端子和电源节点之间的第一开关以及耦合在辅助电源端子和电源节点之间的第二开关。 微型计算机将主电源端子的电压V1与参考电压VR1进行比较。 当V1> VR1时，微型电脑打开第一个开关并关闭第二个开关，当V1

公开(公告)号：US5983330A

公开(公告)日：1999-11-09

申请号：US917189

申请日：1997-08-25

申请人： Yuichiro Miwa ,  Katsunobu Hongo

发明人： Yuichiro Miwa ,  Katsunobu Hongo

IPC分类号： G06F11/30 ,  G06F11/00 ,  G06F12/08

CPC分类号： G06F11/0757

摘要： A microcomputer capable of solving a problem in that the load of software is heavy for setting a watchdog timer in a conventional microcomputer. It includes a switching circuit which supplies a central processing unit with the output of the watchdog timer as an interrupt signal unless a memory data write mode for writing data to a memory is not designated from the outside of the microcomputer, and which inhibits an overflow signal of the watchdog timer from being supplied to the central processing unit when the memory data write mode is designated from the outside of the microcomputer.

摘要翻译： 微型计算机能够解决在现有微型计算机中设置看门狗定时器的软件负担很重的问题。 它包括切换电路，其将中央处理单元与看门狗定时器的输出提供为中断信号，除非从微型计算机的外部指定用于将数据写入存储器的存储器数据写入模式，并且禁止溢出信号 当从微型计算机的外部指定存储器数据写入模式时，看门狗定时器被提供给中央处理单元。

公开(公告)号：US06212646B1

公开(公告)日：2001-04-03

申请号：US09084506

申请日：1998-05-27

申请人： Yuichiro Miwa ,  Katsunobu Hongo

发明人： Yuichiro Miwa ,  Katsunobu Hongo

IPC分类号： G06F104

CPC分类号： G11C16/32 ,  G11C16/3436

摘要： A microcomputer including a flash memory and a CPU for carrying out verification of data written into the flash memory. A flash controller suspends the supply of a clock signal to the CPU when it receives a verification command from the CPU, establishes a verification condition, and reads data from the flash memory. After reading the data from the flash memory, it restarts the supply of the clock signal to the CPU so that the CPU receives the data. This makes it unnecessary for a program of the CPU for writing data into the flash memory to be transferred from the flash memory to a RAM, enabling the structure of the program to be simplified.

摘要翻译： 一种微型计算机，包括闪速存储器和用于执行写入闪速存储器的数据验证的CPU。 闪存控制器从CPU接收到验证命令时，暂停向CPU提供时钟信号，建立验证条件，并从闪存中读取数据。 读取闪存中的数据后，重新开始向CPU提供时钟信号，以便CPU接收数据。 这使得CPU的程序不必将数据写入闪速存储器以从闪速存储器传送到RAM，从而能够简化程序的结构。