公开(公告)号：US06215521B1

公开(公告)日：2001-04-10

申请号：US08940117

申请日：1997-09-29

申请人： Yuji Surisawa ,  Yasutaka Nakashiba

发明人： Yuji Surisawa ,  Yasutaka Nakashiba

IPC分类号： H04N5335

CPC分类号： H01L27/14812

摘要： A solid state image sensor having an unnecessary electric charge exhausting section formed adjacent to a horizontal electric charge transfer section, comprises an N−− semiconductor substrate 1 having a P-well layer 2 formed on a principal surface thereof. On the P-well layer 2, there is formed a horizontal electric charge transfer section adjacent to one end of each of a number of vertical electric charge transfer sections. A transfer channel 15A of each vertical electric charge transfer section and an electric charge barrier region 5A of a transfer channel of the horizontal electric charge transfer section are formed of an N-type semiconductor region, and an electric charge storing region 6A of the transfer channel of the horizontal electric charge transfer section are formed of an N+ semiconductor region. A potential barrier region 11A is formed at the side of the horizontal electric charge transfer section opposite to the vertical electric charge transfer sections. The unnecessary electric charge exhausting section is constituted of an N++ semiconductor region formed at the side of the potential barrier region 11A opposite to the horizontal electric charge transfer section. The electric charge barrier region 5A and the potential barrier region 11A are formed simultaneously and have the same impurity concentration.

摘要翻译： 具有与水平电荷转移部相邻形成的不必要的电荷排出部的固态图像传感器包括在其主面上形成有P阱层2的N-半导体基板1。 在P阱层2上形成有与多个垂直电荷转移部分中的每一个的一端相邻的水平电荷转移部分。 每个垂直电荷转移部分的转移通道15A和水平电荷转移部分的转移通道的电荷势垒区域5A由N型半导体区域形成，并且转移通道的电荷存储区域6A 的水平电荷转移部分由N +半导体区域形成。 在水平电荷转移部分的与垂直电荷转移部相对的一侧形成有势垒区域11A。 不必要的电荷排出部分由形成在与水平电荷转移部分相对的势垒区域11A侧的N ++半导体区域构成。 电荷势垒区域5A和势垒区域11A同时形成并具有相同的杂质浓度。

公开(公告)号：US5830778A

公开(公告)日：1998-11-03

申请号：US828337

申请日：1997-03-28

申请人： Keisuke Hatano ,  Yuji Surisawa ,  Yasutaka Nakashiba

发明人： Keisuke Hatano ,  Yuji Surisawa ,  Yasutaka Nakashiba

IPC分类号： H01L29/762 ,  H01L21/266 ,  H01L21/339 ,  H01L21/00

CPC分类号： H01L29/66954

摘要： In a charge transfer device including single-layer charge transfer electrodes including a p-type polycrystalline silicon layer and an n-type polycrystalline silicon layer, the sizes of the charge accumulation and potential barrier regions can be set to desired values and the height of potential barrier is produced with a desired reproducibility. A polycrystalline silicon layer is fabricated on a surface of a semiconductor substrate. With a photoresist layer 106 as a mask, ions of phosphorus are implanted thereinto so as to form a silicon oxide layer by liquid phase growth. Boron ions are then injected thereinto. The junction region between the n-type and p-type polycrystalline silicon layers is etched for the separation of the charge transfer electrodes.

摘要翻译： 在包括p型多晶硅层和n型多晶硅层的单层电荷转移电极的电荷转移装置中，电荷累积和势垒区域的尺寸可以被设定为期望值和电位高度 以期望的再现性产生屏障。 在半导体衬底的表面上制造多晶硅层。 以光致抗蚀剂层106为掩模，注入磷离子，通过液相生长形成氧化硅层。 然后将硼离子注入其中。 蚀刻n型和p型多晶硅层之间的结区，以分离电荷转移电极。