公开(公告)号：US08211801B2

公开(公告)日：2012-07-03

申请号：US12874332

申请日：2010-09-02

申请人： Chiu-Hsien Yeh ,  Chan-Lon Yang ,  Chin-Cheng Chien ,  Lien-Fa Hung ,  Yun-Cheng Kao

发明人： Chiu-Hsien Yeh ,  Chan-Lon Yang ,  Chin-Cheng Chien ,  Lien-Fa Hung ,  Yun-Cheng Kao

IPC分类号： H01L21/461 ,  H01L21/302

CPC分类号： H01L29/517 ,  H01L21/31111 ,  H01L21/823842 ,  H01L21/823857 ,  H01L21/823878 ,  H01L29/4966 ,  H01L29/513

摘要： A method of fabricating a CMOS device having high-k dielectric layer and metal gate electrode is provided. First, an isolation structure is formed in a substrate to define a first-type and a second-type MOS regions; an interfacial layer and a high-k dielectric layer are sequentially formed over the substrate; a first and a second cover layers are respectively formed over a portion of the high-k dielectric layer at the first-type MOS region and another portion of the high-k dielectric layer at the second-type MOS region; afterwards, an in-situ etching step is performed to sequentially etch the first and second cover layers using a first etching solution and to etch both the high-k dielectric layer and the interfacial layer using a second etching solution until the substrate is exposed. Wherein, the second etching solution is a mixed etching solution containing the first etching solution.

摘要翻译： 提供一种制造具有高k电介质层和金属栅电极的CMOS器件的方法。 首先，在衬底中形成隔离结构以限定第一类型和第二类型的MOS区; 在衬底上顺序地形成界面层和高k电介质层; 第一和第二覆盖层分别形成在第一型MOS区的高k电介质层的一部分和第二类型MOS区的高k电介质层的另一部分上; 之后，执行原位蚀刻步骤以使用第一蚀刻溶液顺次蚀刻第一和第二覆盖层，并且使用第二蚀刻溶液蚀刻高k电介质层和界面层，直到基板被暴露。 其中，第二蚀刻溶液是含有第一蚀刻溶液的混合蚀刻溶液。

公开(公告)号：US20120238065A1

公开(公告)日：2012-09-20

申请号：US13482044

申请日：2012-05-29

申请人： Chiu-Hsien YEH ,  Chan-Lon YANG ,  Chin-Cheng CHIEN ,  Lien-Fa HUNG ,  Yun-Cheng KAO

发明人： Chiu-Hsien YEH ,  Chan-Lon YANG ,  Chin-Cheng CHIEN ,  Lien-Fa HUNG ,  Yun-Cheng KAO

IPC分类号： H01L21/8238

CPC分类号： H01L29/517 ,  H01L21/31111 ,  H01L21/823842 ,  H01L21/823857 ,  H01L21/823878 ,  H01L29/4966 ,  H01L29/513

摘要： A method of fabricating a MOS device comprises steps as follows: An interfacial layer, a high-k dielectric layer and a cover layer on a substrate are sequentially formed. Then an in-situ wet etching step is performed by sequentially using a first etching solution to etch the cover layer and using a second etching solution to etch the high-k dielectric layer and the interfacial layer until the substrate is exposed, wherein the second etching solution is a mixed etching solution containing the first etching solution.

摘要翻译： 制造MOS器件的方法包括以下步骤：依次形成界面层，高k电介质层和衬底上的覆盖层。 然后，通过依次使用第一蚀刻溶液蚀刻覆盖层并使用第二蚀刻溶液来蚀刻高k电介质层和界面层直到基板被暴露来进行原位湿蚀刻步骤，其中第二蚀刻 溶液是含有第一蚀刻溶液的混合蚀刻溶液。

公开(公告)号：US20120058634A1

公开(公告)日：2012-03-08

申请号：US12874332

申请日：2010-09-02

申请人： Chiu-Hsien YEH ,  Chan-Lon YANG ,  Chin-Cheng CHIEN ,  Lien-Fa HUNG ,  Yun-Cheng KAO

发明人： Chiu-Hsien YEH ,  Chan-Lon YANG ,  Chin-Cheng CHIEN ,  Lien-Fa HUNG ,  Yun-Cheng KAO

IPC分类号： H01L21/28

CPC分类号： H01L29/517 ,  H01L21/31111 ,  H01L21/823842 ,  H01L21/823857 ,  H01L21/823878 ,  H01L29/4966 ,  H01L29/513

摘要： A method of fabricating a CMOS device having high-k dielectric layer and metal gate electrode is provided. First, an isolation structure is formed in a substrate to define a first-type and a second-type MOS regions; an interfacial layer and a high-k dielectric layer are sequentially formed over the substrate; a first and a second cover layers are respectively formed over a portion of the high-k dielectric layer at the first-type MOS region and another portion of the high-k dielectric layer at the second-type MOS region; afterwards, an in-situ etching step is performed to sequentially etch the first and second cover layers using a first etching solution and to etch both the high-k dielectric layer and the interfacial layer using a second etching solution until the substrate is exposed. Wherein, the second etching solution is a mixed etching solution containing the first etching solution.

摘要翻译： 提供一种制造具有高k电介质层和金属栅电极的CMOS器件的方法。 首先，在衬底中形成隔离结构以限定第一类型和第二类型的MOS区; 在衬底上顺序地形成界面层和高k电介质层; 第一和第二覆盖层分别形成在第一型MOS区的高k电介质层的一部分和第二型MOS区的高k电介质层的另一部分上; 之后，执行原位蚀刻步骤以使用第一蚀刻溶液顺次蚀刻第一和第二覆盖层，并且使用第二蚀刻溶液蚀刻高k电介质层和界面层，直到基板被暴露。 其中，第二蚀刻溶液是含有第一蚀刻溶液的混合蚀刻溶液。

公开(公告)号：US08404591B2

公开(公告)日：2013-03-26

申请号：US13482044

申请日：2012-05-29

申请人： Chiu-Hsien Yeh ,  Chan-Lon Yang ,  Chin-Cheng Chien ,  Lien-Fa Hung ,  Yun-Cheng Kao

发明人： Chiu-Hsien Yeh ,  Chan-Lon Yang ,  Chin-Cheng Chien ,  Lien-Fa Hung ,  Yun-Cheng Kao

IPC分类号： H01L21/461 ,  H01L21/302

CPC分类号： H01L29/517 ,  H01L21/31111 ,  H01L21/823842 ,  H01L21/823857 ,  H01L21/823878 ,  H01L29/4966 ,  H01L29/513

摘要： A method of fabricating a MOS device comprises steps as follows: An interfacial layer, a high-k dielectric layer and a cover layer on a substrate are sequentially formed. Then an in-situ wet etching step is performed by sequentially using a first etching solution to etch the cover layer and using a second etching solution to etch the high-k dielectric layer and the interfacial layer until the substrate is exposed, wherein the second etching solution is a mixed etching solution containing the first etching solution.

摘要翻译： 制造MOS器件的方法包括以下步骤：依次形成界面层，高k电介质层和衬底上的覆盖层。 然后，通过依次使用第一蚀刻溶液蚀刻覆盖层并使用第二蚀刻溶液来蚀刻高k电介质层和界面层直到基板被暴露来进行原位湿蚀刻步骤，其中第二蚀刻 溶液是含有第一蚀刻溶液的混合蚀刻溶液。