公开(公告)号：US6096604A

公开(公告)日：2000-08-01

申请号：US366739

申请日：1999-08-04

申请人： Cher Liang Cha ,  Anqing Zhang ,  Zhifeng Joseph Xie ,  Eng Fong Chor

发明人： Cher Liang Cha ,  Anqing Zhang ,  Zhifeng Joseph Xie ,  Eng Fong Chor

IPC分类号： H01L21/28 ,  H01L21/8247 ,  H01L21/336 ,  H01L21/8239 ,  H01L29/72

CPC分类号： H01L27/11526 ,  H01L21/28273 ,  H01L27/11543

摘要： This invention relates to the new reversed flash memory device which has improved electrical performance, yield and reliability because of better control of the dielectric interfaces resulting from first making the poly 2 control gate within the silicon substrate. The reverse structure is novel, as are the described process methods for forming the reverse stacking order.Shallow trenched isolation (STI) is first formed in the p-silicon substrate and encompasses the poly 2 control gate region; then the interpoly dielectric is grown/deposited on that single crystal silicon substrate. The floating poly 1 is formed on top of this uniform interpoly dielectric that has well-controlled surface smoothness. The tunnel oxide layer is formed on the floating poly 1 layer, and the source/drain is implanted on a straddling additional poly layer. There are fewer edges and associated stress weaknesses in the dielectric breakdown of both the reversed interpoly dielectric and the floating tunnel oxide. The results are improved electrical quality and more acceptable electrical parameters, including reversed flash memory devices with gate length dimensions below 0.35 microns.

摘要翻译： 本发明涉及新的反向闪存器件，其具有改进的电性能，产量和可靠性，因为通过在硅衬底内首先制造聚二极管控制栅导致的电介质界面的更好控制。 反向结构是新颖的，以及用于形成反向堆叠顺序的所述方法。 首先在p硅衬底中形成浅沟槽隔离（STI）并且包围聚二极管控制区域; 然后在该单晶硅衬底上生长/沉积多晶硅电介质。 浮动聚1形成在该均匀的多晶硅电介质的顶部，其具有良好控制的表面平滑度。 隧道氧化物层形成在浮动聚1层上，并且源极/漏极注入到跨接的附加多晶硅层上。 在反向互聚电介质和浮动隧道氧化物的介电击穿中存在较少的边缘和相关的应力弱点。 结果是改善的电气质量和更可接受的电气参数，包括栅极长度尺寸小于0.35微米的反向闪存器件。