公开(公告)号：US20190371400A1

公开(公告)日：2019-12-05

申请号：US16533278

申请日：2019-08-06

Applicant: ADVANCED MICRO DEVICES, INC.

Inventor： Amin FARMAHINI FARAHANI ,  David A. ROBERTS

IPC: G11C14/00 ,  H01L27/108 ,  G11C7/10

Abstract: A high-performance on-module caching architecture for hybrid memory modules is provided. A hybrid memory module includes a cache controller, a first volatile memory coupled to the cache controller, a first multiplexing data buffer coupled to the first volatile memory and the cache controller, and a first non-volatile memory coupled to the first multiplexing data buffer and the cache controller, wherein the first multiplexing data buffer multiplexes data between the first volatile memory and the first non-volatile memory and wherein the cache controller enables a tag checking operation to occur in parallel with a data movement operation. The hybrid memory module includes a volatile memory tag unit coupled to the cache controller, wherein the volatile memory tag unit includes a line connection that allows the cache controller to store a plurality of tags in the volatile memory tag unit and retrieve the plurality of tags from the volatile memory tag unit.

公开(公告)号：US20190189210A1

公开(公告)日：2019-06-20

申请号：US15841997

申请日：2017-12-14

Applicant: ADVANCED MICRO DEVICES, INC.

Inventor： Amin FARMAHINI FARAHANI ,  David A. ROBERTS

IPC: G11C14/00 ,  G11C7/10 ,  H01L27/108

CPC classification number: G11C14/0018 ,  G11C5/04 ,  G11C7/1084 ,  G11C11/005 ,  G11C2207/2245 ,  H01L27/108

Abstract: A high-performance on-module caching architecture for hybrid memory modules is provided. A hybrid memory module includes a cache controller, a first volatile memory coupled to the cache controller, a first multiplexing data buffer coupled to the first volatile memory and the cache controller, and a first non-volatile memory coupled to the first multiplexing data buffer and the cache controller, wherein the first multiplexing data buffer multiplexes data between the first volatile memory and the first non-volatile memory and wherein the cache controller enables a tag checking operation to occur in parallel with a data movement operation. The hybrid memory module includes a volatile memory tag unit coupled to the cache controller, wherein the volatile memory tag unit includes a line connection that allows the cache controller to store a plurality of tags in the volatile memory tag unit and retrieve the plurality of tags from the volatile memory tag unit.