公开(公告)号：US20230031595A1

公开(公告)日：2023-02-02

申请号：US17961613

申请日：2022-10-07

Applicant: ADVANCED MICRO DEVICES, INC.

Inventor： JAMES R. MAGRO ,  KEDARNATH BALAKRISHNAN ,  BRENDAN T. MANGAN

IPC: G06F13/16 ,  G06F9/30 ,  G06F12/02 ,  G06F12/1009

Abstract: A memory controller includes a memory channel controller that uses multiple groups of command queue and arbiter pairs. Each arbiter is coupled to a respective command queue to select memory access commands from each command queue according to predetermined criteria. Each arbiter selects from among the memory access requests in each command queue independently based on the predetermined criteria and sends selected memory access requests to a selector that serves as a second level arbiter which sends the request to a memory subchannel.

公开(公告)号：US20240370387A1

公开(公告)日：2024-11-07

申请号：US18772708

申请日：2024-07-15

Applicant: ADVANCED MICRO DEVICES, INC.

Inventor： James R. Magro ,  Kedarnath Balakrishnan ,  BRENDAN T. MANGAN

IPC: G06F13/16 ,  G06F9/30 ,  G06F12/02 ,  G06F12/1009

Abstract: A memory controller includes a memory channel controller that uses multiple groups of command queue and arbiter pairs. Each arbiter is coupled to a respective command queue to select memory access commands from each command queue according to predetermined criteria. Each arbiter selects from among the memory access requests in each command queue independently based on the predetermined criteria and sends selected memory access requests to a selector that serves as a second level arbiter which sends the request to a memory subchannel.