公开(公告)号：US20210117196A1

公开(公告)日：2021-04-22

申请号：US16660495

申请日：2019-10-22

Applicant: ADVANCED MICRO DEVICES, INC. ,  ATI TECHNOLOGIES ULC

Inventor： Arun A. NAIR ,  Michael ESTLICK ,  Erik SWANSON ,  Sneha V. DESAI ,  Donglin JI

IPC: G06F9/30 ,  G06F9/38

Abstract: A floating point unit includes a non-pickable scheduler queue (NSQ) that offers a load operation concurrently with a load store unit retrieving load data for an operand that is to be loaded by the load operation. The floating point unit also includes a renamer that renames architectural registers used by the load operation and allocates physical register numbers to the load operation in response to receiving the load operation from the NSQ. The floating point unit further includes a set of pickable scheduler queues that receive the load operation from the renamer and store the load operation prior to execution. A physical register file is implemented in the floating point unit and a free list is used to store physical register numbers of entries in the physical register file that are available for allocation.