公开(公告)号：US20240330205A1

公开(公告)日：2024-10-03

申请号：US18129305

申请日：2023-03-31

Applicant: ADVANCED MICRO DEVICES, INC. ,  ATI TECHNOLOGIES ULC

Inventor： William A. Moyes ,  Carlos Javier Moreira ,  Kathirkamanathan Nadarajah ,  Keith Graham Shaw

IPC: G06F12/14 ,  G06F21/72 ,  H04L9/14

CPC classification number: G06F12/1408 ,  G06F21/72 ,  H04L9/14 ,  G06F2212/1052

Abstract: A processing system includes one or more storage encryption circuits (SIECs) interconnected with one or more input/output (I/O) devices and a system memory. Each SIEC is configured to encrypt and decrypt data as the data passes between the I/O devices and the system memory. To this end, an SIEC includes slots each associated with respective memory addresses of the system memory. Each slot provides an aperture to the associated memory addresses such that the I/O devices use these apertures to indirectly target the associated memory addresses. As the data targeting the memory addresses associated with an aperture passes through an SIEC, the SIEC encrypts or decrypts the data using cryptographic keys stored on the SIEC.