CALIBRATION TECHNIQUES FOR SAR ADCS WITH ON-CHIP RESERVOIR CAPACITORS
    1.
    发明申请
    CALIBRATION TECHNIQUES FOR SAR ADCS WITH ON-CHIP RESERVOIR CAPACITORS 有权
    具有片上储存电容器的SAR ADCS校准技术

    公开(公告)号:US20160182077A1

    公开(公告)日:2016-06-23

    申请号:US14747071

    申请日:2015-06-23

    CPC classification number: H03M1/1071 H03M1/1038 H03M1/462 H03M1/468

    Abstract: When reservoir capacitors are moved on-chip for individual bit decisions, a successive approximation register analog-to-digital converter (SAR ADC) has an addition source of error which can significantly affect the performance of the SAR ADC. Calibration techniques can be applied to measure and correct for such error in an SAR ADC using decide-and-set switching. Specifically, a calibration technique can expose the effective bit weight of each bit under test using a plurality of special input voltages and storing a calibration word for each bit under test to correct for the error. Such a calibration technique can lessen the need to store a calibration word for each possible output word to correct the additional source of error. Furthermore, another calibration technique can expose the effective bit weight of each bit under test without having to generate the plurality of special input voltages.

    Abstract translation: 当存储器电容器在芯片上移动以进行单独的位决定时,逐次逼近寄存器模数转换器(SAR ADC)具有可能显着影响SAR ADC性能的加法误差源。 校准技术可以用于使用决定和设置切换来测量和校正SAR ADC中的这种误差。 具体来说,校准技术可以使用多个特殊输入电压来暴露所测试的每个位的有效位权重,并且存储用于每一位被测位的校准字以校正错误。 这种校准技术可以减少为每个可能的输出字存储校准字以校正附加的误差源的需要。 此外,另一种校准技术可以暴露每个被测位的有效位重量,而不必产生多个特殊输入电压。

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