Abstract:
The disclosed technology relates to an apparatus for protection against transient electrical events. In one aspect, the apparatus includes an analog switch with high bipolar blocking voltage comprising a first p-type well region, a second p-type well region, a first n-type well region disposed between the first and second p-type well regions, and a deep n-type well region surrounding the first p-type well region, the second p-type well region, and the first n-type well region. The apparatus additionally includes a first native n-type region disposed between the first p-type well region the n-type well region and a second native n-type region disposed between the second p-type well region and n-type well region. The apparatus is configured such that the first p-type well region serves as an emitter/collector of a bidirectional PNP bipolar transistor. In addition, the apparatus is configured such that the first native n-type region, the first n-type well region, and the second native n-type region serves as a base of the bidirectional PNP bipolar transistor. Furthermore, the apparatus is configured such that the second p-type well region is configured as a collector/emitter of the bidirectional PNP bipolar transistor.
Abstract:
An apparatus and method for high voltage transient electrical overstress protection are disclosed. In one embodiment, the apparatus includes an internal circuit electrically connected between a first node and a second node; and a protection circuit electrically connected between the first node and the second node. The protection circuit is configured to protect the internal circuit from transient electrical overstress events while maintaining a relatively high holding voltage upon activation. The holes- or electrons-enhanced conduction protection circuit includes a bi-directional bipolar device having an emitter/collector, a base, and a collector/emitter; a first bipolar transistor having an emitter electrically coupled to the first node, a base electrically coupled to the emitter/collector of the bipolar device, and a collector electrically coupled to the base of the bipolar transistor; and a second bipolar transistor having an emitter electrically coupled to the second node, a base electrically coupled to the collector/emitter of the bipolar device, and a collector electrically coupled to the base of the bipolar transistor.
Abstract:
An apparatus and method for high voltage transient electrical overstress protection are disclosed. In one embodiment, the apparatus includes an internal circuit electrically connected between a first node and a second node; and a protection circuit electrically connected between the first node and the second node. The protection circuit is configured to protect the internal circuit from transient electrical overstress events while maintaining a relatively high holding voltage upon activation. The holes- or electrons-enhanced conduction protection circuit includes a bi-directional bipolar device having an emitter/collector, a base, and a collector/emitter; a first bipolar transistor having an emitter electrically coupled to the first node, a base electrically coupled to the emitter/collector of the bipolar device, and a collector electrically coupled to the base of the bipolar transistor; and a second bipolar transistor having an emitter electrically coupled to the second node, a base electrically coupled to the collector/emitter of the bipolar device, and a collector electrically coupled to the base of the bipolar transistor.
Abstract:
The disclosed technology relates to an apparatus for protection against transient electrical events. In one aspect, the apparatus includes an analog switch with high bipolar blocking voltage comprising a first p-type well region, a second p-type well region, a first n-type well region disposed between the first and second p-type well regions, and a deep n-type well region surrounding the first p-type well region, the second p-type well region, and the first n-type well region. The apparatus additionally includes a first native n-type region disposed between the first p-type well region the n-type well region and a second native n-type region disposed between the second p-type well region and n-type well region. The apparatus is configured such that the first p-type well region serves as an emitter/collector of a bidirectional PNP bipolar transistor. In addition, the apparatus is configured such that the first native n-type region, the first n-type well region, and the second native n-type region serves as a base of the bidirectional PNP bipolar transistor. Furthermore, the apparatus is configured such that the second p-type well region is configured as a collector/emitter of the bidirectional PNP bipolar transistor.