Analog switch with high bipolar blocking voltage in low voltage CMOS process
    1.
    发明授权
    Analog switch with high bipolar blocking voltage in low voltage CMOS process 有权
    在低电压CMOS工艺中具有高双极性阻断电压的模拟开关

    公开(公告)号:US09171832B2

    公开(公告)日:2015-10-27

    申请号:US13902729

    申请日:2013-05-24

    CPC classification number: H01L27/0262 H01L29/7436

    Abstract: The disclosed technology relates to an apparatus for protection against transient electrical events. In one aspect, the apparatus includes an analog switch with high bipolar blocking voltage comprising a first p-type well region, a second p-type well region, a first n-type well region disposed between the first and second p-type well regions, and a deep n-type well region surrounding the first p-type well region, the second p-type well region, and the first n-type well region. The apparatus additionally includes a first native n-type region disposed between the first p-type well region the n-type well region and a second native n-type region disposed between the second p-type well region and n-type well region. The apparatus is configured such that the first p-type well region serves as an emitter/collector of a bidirectional PNP bipolar transistor. In addition, the apparatus is configured such that the first native n-type region, the first n-type well region, and the second native n-type region serves as a base of the bidirectional PNP bipolar transistor. Furthermore, the apparatus is configured such that the second p-type well region is configured as a collector/emitter of the bidirectional PNP bipolar transistor.

    Abstract translation: 所公开的技术涉及用于防止瞬时电气事件的装置。 一方面,该装置包括具有高双极性阻断电压的模拟开关,包括第一p型阱区,第二p型阱区,设置在第一和第二p型阱区之间的第一n型阱区 以及围绕第一p型阱区域,第二p型阱区域和第一n型阱区域的深n型阱区域。 该装置还包括设置在第一p型阱区n型阱区和设置在第二p型阱区与n型阱区之间的第二天然n型区之间的第一天然n型区。 该装置被配置为使得第一p型阱区域用作双向PNP双极晶体管的发射极/集电极。 此外,该装置被配置为使得第一天然n型区域,第一n型阱区域和第二天然n型区域用作双向PNP双极晶体管的基极。 此外,该装置被配置为使得第二p型阱区被配置为双向PNP双极晶体管的集电极/发射极。

    Apparatus and method for transient electrical overstress protection
    2.
    发明授权
    Apparatus and method for transient electrical overstress protection 有权
    瞬态电气过载保护装置及方法

    公开(公告)号:US08633509B2

    公开(公告)日:2014-01-21

    申请号:US13913202

    申请日:2013-06-07

    CPC classification number: H01L29/747 H01L27/0262 H01L29/66386

    Abstract: An apparatus and method for high voltage transient electrical overstress protection are disclosed. In one embodiment, the apparatus includes an internal circuit electrically connected between a first node and a second node; and a protection circuit electrically connected between the first node and the second node. The protection circuit is configured to protect the internal circuit from transient electrical overstress events while maintaining a relatively high holding voltage upon activation. The holes- or electrons-enhanced conduction protection circuit includes a bi-directional bipolar device having an emitter/collector, a base, and a collector/emitter; a first bipolar transistor having an emitter electrically coupled to the first node, a base electrically coupled to the emitter/collector of the bipolar device, and a collector electrically coupled to the base of the bipolar transistor; and a second bipolar transistor having an emitter electrically coupled to the second node, a base electrically coupled to the collector/emitter of the bipolar device, and a collector electrically coupled to the base of the bipolar transistor.

    Abstract translation: 公开了一种用于高压瞬态电过载保护的装置和方法。 在一个实施例中,该装置包括电连接在第一节点和第二节点之间的内部电路; 以及电连接在第一节点和第二节点之间的保护电路。 保护电路被配置为保护内部电路免受瞬态电应力事件的影响,同时在激活时保持相对较高的保持电压。 空穴或电子增强的传导保护电路包括具有发射极/集电极,基极和集电极/发射极的双向双极器件; 第一双极晶体管,其具有电耦合到第一节点的发射极,电耦合到双极器件的发射极/集电极的基极,以及电耦合到双极晶体管的基极的集电极; 以及具有电耦合到第二节点的发射极的第二双极晶体管,电耦合到双极器件的集电极/发射极的基极,以及电耦合到双极晶体管的基极的集电极。

    APPARATUS AND METHOD FOR TRANSIENT ELECTRICAL OVERSTRESS PROTECTION
    3.
    发明申请
    APPARATUS AND METHOD FOR TRANSIENT ELECTRICAL OVERSTRESS PROTECTION 有权
    瞬态电气过载保护装置及方法

    公开(公告)号:US20130270605A1

    公开(公告)日:2013-10-17

    申请号:US13913202

    申请日:2013-06-07

    CPC classification number: H01L29/747 H01L27/0262 H01L29/66386

    Abstract: An apparatus and method for high voltage transient electrical overstress protection are disclosed. In one embodiment, the apparatus includes an internal circuit electrically connected between a first node and a second node; and a protection circuit electrically connected between the first node and the second node. The protection circuit is configured to protect the internal circuit from transient electrical overstress events while maintaining a relatively high holding voltage upon activation. The holes- or electrons-enhanced conduction protection circuit includes a bi-directional bipolar device having an emitter/collector, a base, and a collector/emitter; a first bipolar transistor having an emitter electrically coupled to the first node, a base electrically coupled to the emitter/collector of the bipolar device, and a collector electrically coupled to the base of the bipolar transistor; and a second bipolar transistor having an emitter electrically coupled to the second node, a base electrically coupled to the collector/emitter of the bipolar device, and a collector electrically coupled to the base of the bipolar transistor.

    Abstract translation: 公开了一种用于高压瞬态电过载保护的装置和方法。 在一个实施例中,该装置包括电连接在第一节点和第二节点之间的内部电路; 以及电连接在第一节点和第二节点之间的保护电路。 保护电路被配置为保护内部电路免受瞬态电应力事件的影响,同时在激活时保持相对较高的保持电压。 空穴或电子增强的传导保护电路包括具有发射极/集电极,基极和集电极/发射极的双向双极器件; 第一双极晶体管,其具有电耦合到第一节点的发射极,电耦合到双极器件的发射极/集电极的基极,以及电耦合到双极晶体管的基极的集电极; 以及具有电耦合到第二节点的发射极的第二双极晶体管,电耦合到双极器件的集电极/发射极的基极,以及电耦合到双极晶体管的基极的集电极。

    ANALOG SWITCH WITH HIGH BIPOLAR BLOCKING VOLTAGE IN LOW VOLTAGE CMOS PROCESS
    4.
    发明申请
    ANALOG SWITCH WITH HIGH BIPOLAR BLOCKING VOLTAGE IN LOW VOLTAGE CMOS PROCESS 有权
    在低电压CMOS工艺中具有高双极性阻塞电压的模拟开关

    公开(公告)号:US20140346563A1

    公开(公告)日:2014-11-27

    申请号:US13902729

    申请日:2013-05-24

    CPC classification number: H01L27/0262 H01L29/7436

    Abstract: The disclosed technology relates to an apparatus for protection against transient electrical events. In one aspect, the apparatus includes an analog switch with high bipolar blocking voltage comprising a first p-type well region, a second p-type well region, a first n-type well region disposed between the first and second p-type well regions, and a deep n-type well region surrounding the first p-type well region, the second p-type well region, and the first n-type well region. The apparatus additionally includes a first native n-type region disposed between the first p-type well region the n-type well region and a second native n-type region disposed between the second p-type well region and n-type well region. The apparatus is configured such that the first p-type well region serves as an emitter/collector of a bidirectional PNP bipolar transistor. In addition, the apparatus is configured such that the first native n-type region, the first n-type well region, and the second native n-type region serves as a base of the bidirectional PNP bipolar transistor. Furthermore, the apparatus is configured such that the second p-type well region is configured as a collector/emitter of the bidirectional PNP bipolar transistor.

    Abstract translation: 所公开的技术涉及用于防止瞬时电气事件的装置。 一方面,该装置包括具有高双极性阻断电压的模拟开关,包括第一p型阱区,第二p型阱区,设置在第一和第二p型阱区之间的第一n型阱区 以及围绕第一p型阱区域,第二p型阱区域和第一n型阱区域的深n型阱区域。 该装置还包括设置在第一p型阱区n型阱区和设置在第二p型阱区与n型阱区之间的第二天然n型区之间的第一天然n型区。 该装置被配置为使得第一p型阱区域用作双向PNP双极晶体管的发射极/集电极。 此外,该装置被配置为使得第一天然n型区域,第一n型阱区域和第二天然n型区域用作双向PNP双极晶体管的基极。 此外,该装置被配置为使得第二p型阱区被配置为双向PNP双极晶体管的集电极/发射极。

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