公开(公告)号：US10146732B2

公开(公告)日：2018-12-04

申请号：US13747205

申请日：2013-01-22

Applicant: Apple Inc.

Inventor： Girault W. Jones ,  Nathan A. Johanningsmeier ,  Casey L. Hardy

IPC: G06F13/42 ,  G06F3/00 ,  G06F5/00

Abstract: An audio system bus has a bus data line and a bus clock line. Audio producers are coupled to the bus to form a time-division multiplexed multi drop bus interface arrangement having protocol slots 0, 1, . . . N where N is an integer greater than two. A bus device is coupled to the bus that produces a) a frame marker on the bus data line in slot 0, and b) a data bit on the bus data line in slot 1. The audio producers are to produce their respective audio data bits in their assigned slots other than slots 0 and 1. Other embodiments are also described and claimed.

公开(公告)号：US20140207983A1

公开(公告)日：2014-07-24

申请号：US13747205

申请日：2013-01-22

Applicant: APPLE INC.

Inventor： Girault W. Jones ,  Nathan A. Johanningsmeier ,  Casey L. Hardy

IPC: G06F13/38

CPC classification number: G06F13/4291 ,  Y02D10/14 ,  Y02D10/151

Abstract: An audio system bus has a bus data line and a bus clock line. Audio producers are coupled to the bus to form a time-division multiplexed multi drop bus interface arrangement having protocol slots 0,1, . . . N where N is an integer greater than two. A bus device is coupled to the bus that produces a) a frame marker on the bus data line in slot 0, and b) a data bit on the bus data line in slot 1. The audio producers are to produce their respective audio data bits in their assigned slots other than slots 0 and 1. Other embodiments are also described and claimed.

Abstract translation: 音频系统总线具有总线数据线和总线时钟线。 音频产生器耦合到总线以形成具有协议时隙0,1的时分复用多载波总线接口装置。 。 。 N，其中N是大于2的整数。 总线设备耦合到总线，该总线产生a）在时隙0中的总线数据线上的帧标记，以及b）时隙1中总线数据线上的数据位。音频制作者将产生它们各自的音频数据位 在它们分配的时隙中，除了时隙0和1之外，还描述和要求保护其他实施例。

公开(公告)号：US09231543B2

公开(公告)日：2016-01-05

申请号：US14153984

申请日：2014-01-13

Applicant: Apple Inc.

Inventor： Roderick Hogan ,  Joseph J. Curcio ,  Nathan A. Johanningsmeier ,  Casey L. Hardy

IPC: H03F99/00 ,  H03G3/00 ,  H03G3/20

CPC classification number: H03G3/004 ,  H03G3/20 ,  H03G3/3005

Abstract: A power converter has an output that is coupled in parallel with an energy reservoir circuit and a power supply node of an audio power amplifier. The converter can set an upper limit on its input supply current that is variable in accordance with a control input. A controller is to produce a signal, coupled to the control input of the power converter, that is responsive to a measure of input supply voltage of the power converter and either output voltage of the power converter or output power of the amplifier. Other embodiments are also described and claimed.

Abstract translation: 功率转换器具有与能量存储器电路和音频功率放大器的电源节点并联的输出。 转换器可以根据控制输入设置可变输入电源电流的上限。 控制器将产生耦合到功率转换器的控制输入端的信号，其响应于功率转换器的输入电源电压的测量以及功率转换器的输出电压或放大器的输出功率。 还描述和要求保护其他实施例。