公开(公告)号：US09967664B1

公开(公告)日：2018-05-08

申请号：US15601931

申请日：2017-05-22

Applicant: Apple Inc.

Inventor： Yang Boon Quek ,  Scott P. Porter ,  Roderick B. Hogan ,  Hongdan Tao ,  Suzanne C. Brown ,  Christopher Wilk ,  Nathan A. Johanningsmeier

IPC: H04R3/00 ,  H04R23/00 ,  H04R29/00 ,  H04R9/02 ,  H04R9/06 ,  G01S17/08 ,  G01K7/00

CPC classification number: H04R3/007 ,  G01K7/00 ,  G01S17/08 ,  H04R9/025 ,  H04R9/06 ,  H04R23/008 ,  H04R29/001 ,  H04R2499/11 ,  H04R2499/15

Abstract: A micro speaker assembly including a micro speaker having a top plate, a bottom plate parallel to the top plate, a magnet assembly coupled to one of the top plate or the bottom plate, a compliant member positioned between the magnet assembly and the top plate or the bottom plate, the compliant member operable to be displaced in response to an acoustic input, and a voice coil coupled to the compliant member. The assembly further including an optical sensor coupled to the micro speaker, the optical sensor having a light emitter and a light detector, the light emitter and the light detector being fixedly coupled to the top plate or the bottom plate, and the optical sensor being operable to produce a displacement signal corresponding to a displacement of the compliant member and a temperature signal corresponding to a temperature of the magnet assembly.

公开(公告)号：US09231543B2

公开(公告)日：2016-01-05

申请号：US14153984

申请日：2014-01-13

Applicant: Apple Inc.

Inventor： Roderick Hogan ,  Joseph J. Curcio ,  Nathan A. Johanningsmeier ,  Casey L. Hardy

IPC: H03F99/00 ,  H03G3/00 ,  H03G3/20

CPC classification number: H03G3/004 ,  H03G3/20 ,  H03G3/3005

Abstract: A power converter has an output that is coupled in parallel with an energy reservoir circuit and a power supply node of an audio power amplifier. The converter can set an upper limit on its input supply current that is variable in accordance with a control input. A controller is to produce a signal, coupled to the control input of the power converter, that is responsive to a measure of input supply voltage of the power converter and either output voltage of the power converter or output power of the amplifier. Other embodiments are also described and claimed.

Abstract translation: 功率转换器具有与能量存储器电路和音频功率放大器的电源节点并联的输出。 转换器可以根据控制输入设置可变输入电源电流的上限。 控制器将产生耦合到功率转换器的控制输入端的信号，其响应于功率转换器的输入电源电压的测量以及功率转换器的输出电压或放大器的输出功率。 还描述和要求保护其他实施例。

公开(公告)号：US20150382104A1

公开(公告)日：2015-12-31

申请号：US14315863

申请日：2014-06-26

Applicant: Apple Inc.

Inventor： Roderick B. Hogan ,  Girault W. Jones ,  Nathan A. Johanningsmeier

IPC: H04R3/00

CPC classification number: H04R3/00 ,  H04R2420/09 ,  H04R2499/13

Abstract: A method for audio signal processing, where an audio amplifier drives a load through a connector, using 1) an input audio signal, and 2) a signal from a return pin of the connector. Output headroom of the audio amplifier is automatically detected, while the amplifier is driving the load. A variable resistor circuit that is coupled to provide variable resistance between the return pin of the connector and a ground plane, is automatically adjusted, in response to the detected output headroom of the amplifier. Other embodiments are also described and claimed.

Abstract translation: 一种用于音频信号处理的方法，其中音频放大器通过连接器驱动负载，使用1）输入音频信号，以及2）来自所述连接器的返回引脚的信号。 当放大器驱动负载时，自动检测音频放大器的输出净空。 响应于检测到的放大器的输出净空，自动调整耦合以提供连接器的返回引脚和接地平面之间的可变电阻的可变电阻器电路。 还描述和要求保护其他实施例。

公开(公告)号：US20150296292A1

公开(公告)日：2015-10-15

申请号：US14252461

申请日：2014-04-14

Applicant: Apple Inc.

Inventor： Roderick B. Hogan ,  Nathan A. Johanningsmeier

IPC: H04R3/00

CPC classification number: H04R29/001 ,  H04R3/12

Abstract: A programmed data processor receives input voltage measurements for a number of speaker drivers, wherein each of the voltage measurements may be a sensed or estimated sequence of time-domain samples of a respective speaker driver input voltage that is over a different time frame. The processor obtains a sensed shared current, being a measure of current in a single power supply rail that is feeding power to each of a number of audio amplifiers, while the audio amplifiers are driving the speaker drivers in accordance with a number of audio channel signals, respectively. The processor computes an estimate of electrical input impedance for each of the speaker drivers using the sensed shared current and the input voltage measurements. Other embodiments are also described and claimed.

Abstract translation: 编程数据处理器接收多个扬声器驱动器的输入电压测量值，其中每个电压测量可以是在不同时间帧上的相应扬声器驱动器输入电压的感测或估计的时域样本序列。 处理器获得感测到的共享电流，其是在单个电源轨中的电流测量，该电源轨正在向多个音频放大器中的每一个供电，同时音频放大器根据多个音频通道信号驱动扬声器驱动器 ， 分别。 处理器使用感测到的共享电流和输入电压测量来计算每个扬声器驱动器的电输入阻抗的估计。 还描述和要求保护其他实施例。

公开(公告)号：US20140207983A1

公开(公告)日：2014-07-24

申请号：US13747205

申请日：2013-01-22

Applicant: APPLE INC.

Inventor： Girault W. Jones ,  Nathan A. Johanningsmeier ,  Casey L. Hardy

IPC: G06F13/38

CPC classification number: G06F13/4291 ,  Y02D10/14 ,  Y02D10/151

Abstract: An audio system bus has a bus data line and a bus clock line. Audio producers are coupled to the bus to form a time-division multiplexed multi drop bus interface arrangement having protocol slots 0,1, . . . N where N is an integer greater than two. A bus device is coupled to the bus that produces a) a frame marker on the bus data line in slot 0, and b) a data bit on the bus data line in slot 1. The audio producers are to produce their respective audio data bits in their assigned slots other than slots 0 and 1. Other embodiments are also described and claimed.

Abstract translation: 音频系统总线具有总线数据线和总线时钟线。 音频产生器耦合到总线以形成具有协议时隙0,1的时分复用多载波总线接口装置。 。 。 N，其中N是大于2的整数。 总线设备耦合到总线，该总线产生a）在时隙0中的总线数据线上的帧标记，以及b）时隙1中总线数据线上的数据位。音频制作者将产生它们各自的音频数据位 在它们分配的时隙中，除了时隙0和1之外，还描述和要求保护其他实施例。

公开(公告)号：US10666209B2

公开(公告)日：2020-05-26

申请号：US16195546

申请日：2018-11-19

Applicant: Apple Inc.

Inventor： Roderick B. Hogan ,  Troy A. Murphy ,  Nathan A. Johanningsmeier

IPC: H03F3/217 ,  H03F1/56 ,  H04R3/00 ,  H03F3/183

Abstract: An audio amplifier has a first H bridge and a second H bridge, to drive a speaker as a load. The second H bridge drives the speaker through resistors for increased output impedance. Control logic operates the first H bridge as a class D amplifier for larger amplitudes of audio signal, and operates the second H bridge as a class D amplifier for smaller amplitudes of audio signal. Other aspects are also described and claimed.

公开(公告)号：US10254134B2

公开(公告)日：2019-04-09

申请号：US15417962

申请日：2017-01-27

Applicant: Apple Inc.

Inventor： Roderick B. Hogan ,  Nathan A. Johanningsmeier

IPC: G01R27/00 ,  G01D5/24

Abstract: An excitation signal is produced on a plate of an unknown capacitor and on a plate of a known capacitor. The excitation signal is amplified over time to produce a first output signal, with gain that is proportional to capacitance of the unknown capacitor. The excitation signal is also amplified over time to produce a second output signal, with gain that is proportional to capacitance of the known capacitor. Capacitance of the unknown capacitor is computed using a mathematical function of the first and second output signals and the capacitance of the known capacitor, while being insensitive to amplitude of the excitation signal. Other embodiments are also described and claimed.

公开(公告)号：US09699558B2

公开(公告)日：2017-07-04

申请号：US13712327

申请日：2012-12-12

Applicant: Apple Inc.

Inventor： Girault W. Jones ,  Nathan A. Johanningsmeier ,  Martin E. Johnson

IPC: H04R1/40 ,  H03M1/66 ,  H04R3/12 ,  H04S3/00

CPC classification number: H04R3/12 ,  H04S3/008

Abstract: A multi-channel audio system that can provide a variable sub-sample delay between two or more audio channels. In one embodiment, a variable timing clock generator generates multiple clock signals where each may have different phase, and the clock generator can vary the phase difference, in accordance with a sub-sample delay setting input. These clock signals are used by respective digital-to-analog converters (DACs) to convert the digital audio channels into analog form. In another embodiment, a variable delay block is added to an oversampling DAC, on a per channel basis. Other embodiments are also described and claimed.

公开(公告)号：US20160165327A1

公开(公告)日：2016-06-09

申请号：US14563990

申请日：2014-12-08

Applicant: Apple Inc.

Inventor： Justin D. Crosby ,  Matthew A. Donarski ,  Andrew P. Bright ,  Joss N. Giddings ,  Ron A. Hopkinson ,  Nathan A. Johanningsmeier ,  William F. Leggett ,  Mikael M. Silvanto

IPC: H04R1/02

CPC classification number: H04R1/2811 ,  H04R1/288 ,  H04R2499/15

Abstract: A computer system having a loudspeaker mounted on a main logic board by a hermetic seal, is disclosed. More particularly, embodiments of the computer system include an acoustic cavity defined between the loudspeaker, the main logic board, and the hermetic seal. Embodiments of the computer system may include a compressible seal separated from the hermetic seal by the loudspeaker and/or the main logic board. The compressible seal may define an acoustic channel and the loudspeaker may emit sound in a high frequency range through the acoustic channel toward a system exit. Other embodiments are also described and claimed.

Abstract translation: 公开了一种具有通过气密密封安装在主逻辑板上的扬声器的计算机系统。 更具体地，计算机系统的实施例包括在扬声器，主逻辑板和气密密封之间限定的声腔。 计算机系统的实施例可以包括通过扬声器和/或主逻辑板与密封件分离的可压缩密封件。 可压缩密封件可以限定声学通道，并且扬声器可以通过声学通道朝向系统出口发出高频范围内的声音。 还描述和要求保护其他实施例。

公开(公告)号：US20140161279A1

公开(公告)日：2014-06-12

申请号：US13712327

申请日：2012-12-12

Applicant: APPLE INC.

Inventor： Girault W. Jones ,  Nathan A. Johanningsmeier ,  Martin E. Johnson

IPC: H04R3/12

CPC classification number: H04R3/12 ,  H04S3/008

Abstract: A multi-channel audio system that can provide a variable sub-sample delay between two or more audio channels. In one embodiment, a variable timing clock generator generates multiple clock signals where each may have different phase, and the clock generator can vary the phase difference, in accordance with a sub-sample delay setting input. These clock signals are used by respective digital-to-analog converters (DACs) to convert the digital audio channels into analog form. In another embodiment, a variable delay block is added to an oversampling DAC, on a per channel basis. Other embodiments are also described and claimed.

Abstract translation: 可以在两个或多个音频通道之间提供可变子采样延迟的多声道音频系统。 在一个实施例中，可变定时时钟发生器产生多个时钟信号，其中每个时钟信号可以具有不同的相位，并且时钟发生器可以根据子采样延迟设置输入来改变相位差。 这些时钟信号由相应的数模转换器（DAC）用于将数字音频通道转换为模拟形式。 在另一个实施例中，可变延迟块以每通道为基础被添加到过采样DAC。 还描述和要求保护其他实施例。