Abstract:
The disclosed embodiments provide a system that operates a processor in a computer system. During operation, the system uses the processor to maintain a count of outstanding input/output (I/O) requests for a component in the computer system. Next, the system facilitates efficient execution of the processor by overriding a latency tolerance reporting (LTR) value for the component based on the count.
Abstract:
The disclosed embodiments provide a system that operates a processor in a computer system. During operation, the system uses the processor to maintain a count of outstanding input/output (I/O) requests for a component in the computer system. Next, the system facilitates efficient execution of the processor by overriding a latency tolerance reporting (LTR) value for the component based on the count.
Abstract:
The disclosed embodiments provide a system that facilitates the processing of commands in a set of devices. The system includes a host bus adapter that provides an interface for connecting the set of devices to the host and manages the allocation of a set of tags to one or more of the devices. For each device connected to the host, the system also includes a queue-management apparatus that sends a tag request for the device to the host bus adapter. The queue-management apparatus then receives a subset of the tags for the device from the host bus adapter and uses the set of tags to queue commands from the host to the device and track the status of the queued commands.