Abstract:
The disclosed embodiments provide a system that operates a processor in a computer system. During operation, the system uses the processor to maintain a count of outstanding input/output (I/O) requests for a component in the computer system. Next, the system facilitates efficient execution of the processor by overriding a latency tolerance reporting (LTR) value for the component based on the count.
Abstract:
Disclosed herein is a technique for maintaining a responsive user interface for a user while preserving battery life of a user device by dynamically determining the interrupt rate/interrupt time at the user device. Based on priority tier information associated with the I/O requests along with the directionality and size of the I/O requests, a determination can be made regarding how the interrupt rate/interrupt time can be adjusted to achieve acceptable user interface (UI) responsiveness and maximum power savings.
Abstract:
Disclosed herein is a technique for dynamically scaling a low-power self-refresh (LPSR) idle interval associated with a solid state drive (SSD) of a user device in order to promote enhanced battery life efficiency within the user device. A determination can be made regarding whether the LPSR idle interval is to be scaled up or scaled down. Specifically, the determination is based on a total elapsed since the user device was first powered on and a total number of LPSR transitions or cycles that have been performed in association with the SSD. In turn, the dynamic scaling of the LPSR idle intervals causes NAND power-cycles to be consumed responsibly over an average system lifetime of the user device, which can result in better power management at the user device.
Abstract:
Disclosed herein is a technique for managing I/O requests transmitted between a computing device and a storage device. According to some embodiments, the technique can be implemented by the computing device, and include providing at least one I/O request to a submission queue configured to store a plurality of I/O requests. In conjunction with providing the at least one I/O request, the computing device can identify that at least one condition associated with the submission queue—and/or a completion queue—is satisfied, where efficiency gains can be achieved. In turn, the computing device can (1) update an operating mode of the storage device to cause the storage device to cease interrupt issuances to the computing device when I/O requests are completed by the storage device, and (2) update an operating mode of the computing device to cause the computing device to periodically check the completion queue for completed I/O requests.
Abstract:
Disclosed herein is a technique for preserving an expected lifespan of a non-volatile memory that is communicably coupled with a computing device. According to some embodiments, the technique can be implemented by the computing device, and include (1) receiving metrics associated with the non-volatile memory, (2) for each application of a plurality of applications associated with the computing device: establishing, based on the metrics, a respective write budget for the application. According to some embodiments, the respective write budget for each application can be further based on a count of the plurality of applications. Additionally, the technique can further include (3) receiving, from an application of the plurality of applications, a write request directed to the non-volatile memory, and (4) in response to determining that the write request does not violate the respective write budget for the application: issuing the write request to the non-volatile memory.
Abstract:
The disclosed embodiments provide a system that operates a processor in a computer system. During operation, the system uses the processor to maintain a count of outstanding input/output (I/O) requests for a component in the computer system. Next, the system facilitates efficient execution of the processor by overriding a latency tolerance reporting (LTR) value for the component based on the count.
Abstract:
A storage system having an input-output (IO) component, a solid state drive (SSD) with multiple logical units (LUNs), e.g., flash storage units, and a controller coupled to the IO component and the SSD. The controller can cause the storage system to receive an operation request, determine various operational throughputs associated with outstanding commands of the SSD (e.g., read or write commands to be performed by the SSD), determine a time required for the SSD to process the outstanding commands based in part on the operational throughputs, and assign a timeout value to the received operation request. The timeout value may correspond to the time required for the SSD to process the outstanding commands. Any of the operational throughputs may be throttled when a die temperature of any of the SSD's LUNs exceeds an operating temperature threshold, or when an ambient temperature affecting SSD exceeds an ambient temperature threshold.
Abstract:
A storage system having an input-output (IO) component, a solid state drive (SSD) with multiple logical units (LUNs), e.g., flash storage units, and a controller coupled to the IO component and the SSD. The controller can cause the storage system to receive an operation request, determine various operational throughputs associated with outstanding commands of the SSD (e.g., read or write commands to be performed by the SSD), determine a time required for the SSD to process the outstanding commands based in part on the operational throughputs, and assign a timeout value to the received operation request. The timeout value may correspond to the time required for the SSD to process the outstanding commands. Any of the operational throughputs may be throttled when a die temperature of any of the SSD's LUNs exceeds an operating temperature threshold, or when an ambient temperature affecting SSD exceeds an ambient temperature threshold.