公开(公告)号：US20140266328A1

公开(公告)日：2014-09-18

申请号：US13846311

申请日：2013-03-18

Applicant: APPLIED MICRO CIRCUITS CORPORATION

Inventor： Yehuda AZENKOT ,  Michael GROSNER ,  Timothy P. WALKER

IPC: H03L7/16

CPC classification number: H03L7/06

Abstract: Systems and methods for frequency synthesis using a gapper. A frequency synthesizer may comprise a gapper, a first integer divider and a Phase Locked Loop (PLL). When a frequency of an output signal is intended to be greater than a corresponding input signal, a factor can be borrowed by the gapper from the first integer divider to generate a rational divide ratio G that is greater 1 in order for the gapper to be capable of performing the division by G. The PLL is capable of multiplying a gapped signal output from the first integer divider and attenuating jitter from the gapped signal.

Abstract translation: 使用缝隙器进行频率合成的系统和方法。 频率合成器可以包括间隔器，第一整数除法器和锁相环（PLL）。 当输出信号的频率意图大于相应的输入信号时，由第一整数除法器可以通过间隙借用一个因子，以便产生一个大于1的有理分频比G，以使分频器能够 通过G执行除法。PLL能够将从第一整数分频器输出的有间隙信号相乘并衰减来自有间隙信号的抖动。

公开(公告)号：US20140266339A1

公开(公告)日：2014-09-18

申请号：US13846171

申请日：2013-03-18

Applicant: APPLIED MICRO CIRCUITS CORPORATION

Inventor： Yehuda AZENKOT ,  Michael GROSNER ,  Timothy P. WALKER

IPC: H03L7/08

CPC classification number: H03L7/06

Abstract: Systems and methods for generating gapped signals comprising a Delta Sigma Modulator (DSM) configured to generate gapping control signals used to control gap removal rates of an associated gapping unit. The DSM is configured to generate a gapping control signal based on a value of an overflow resulted from performing adding a first number with a remainder of a stored value modulo a second number. The gap removal rates as well as the gap removal resolutions can be adjusted by selecting appropriate values of the first number, the stored value, and the second number. The gapping resolution can be a portion of a pulse. The first number and the second number may be derived from an intended frequency ratio between a gapped signal and a corresponding input signal. The gapping unit may comprise a gapping circuit or a multi-modulus divider.

Abstract translation: 用于产生有间隙信号的系统和方法包括配置成产生用于控制相关间隙单元的间隙去除速率的间隙控制信号的ΔΣ调制器（DSM）。 DSM被配置为基于通过执行将具有第二数量的存储值的剩余部分的第一数字相加的溢出的值来生成间隙控制信号。 可以通过选择第一个数字，存储值和第二个数字的适当值来调整间隙去除率以及间隙去除分辨率。 间隙分辨率可以是脉冲的一部分。 第一数字和第二数字可以从有间隙信号和对应的输入信号之间的预期频率比率导出。 间隙单元可以包括间隙电路或多模式分配器。

公开(公告)号：US20140375364A1

公开(公告)日：2014-12-25

申请号：US14469456

申请日：2014-08-26

Applicant: Applied Micro Circuits Corporation

Inventor： Yehuda AZENKOT ,  Michael GROSNER ,  Timothy P. WALKER

IPC: H03L7/16

CPC classification number: H03L7/06

Abstract: Systems and methods for frequency synthesis using a gapper and a multi-modulus divider. A frequency synthesizer may comprise a gapper, a multi-modulus divider and a Phase Locked Loop (PLL). When a frequency of an output signal is intended to be greater than a corresponding input signal, a factor can be borrowed by the gapper from the divider to generate a rational divide ratio G that is greater 1 in order for the gapper to be capable of performing the division by G. The PLL is capable of multiplying a gapped signal output from the first integer divider and attenuating jitter from the gapped signal.

Abstract translation: 使用间隙和多模式分频器进行频率合成的系统和方法。 频率合成器可以包括间隔器，多模式分频器和锁相环（PLL）。 当输出信号的频率意图大于相应的输入信号时，可以由分频器借由分频器的因子，以产生大于1的有理分频比G，以使分频器能够执行 由G.的分频。PLL能够乘以来自第一整数分频器的有间隙信号输出，并从有间隙信号衰减抖动。