TAG CHECKING APPARATUS AND METHOD
    1.
    发明公开

    公开(公告)号:US20230236925A1

    公开(公告)日:2023-07-27

    申请号:US17999780

    申请日:2021-05-27

    Applicant: Arm Limited

    CPC classification number: G06F11/0793 G06F12/145 G06F11/073 G06F2212/1052

    Abstract: An apparatus has tag checking circuitry responsive to a target address to: identify a guard tag stored in a memory system in association with a block of one or more memory locations, the block containing a target memory location identified by the target address, perform a tag check based on the guard tag and an address tag associated with the target address, and in response to detecting a mismatch in the tag check, perform an error response action. The apparatus also has tag mapping storage circuitry to store mapping information indicative of a mapping between guard tag values and corresponding address tag values. The tag checking circuitry remaps at least one of the guard tag and the address tag based on the mapping information stored by the tag mapping storage circuitry to generate a remapped tag for use in the tag check.

    DATA STORAGE
    2.
    发明申请
    DATA STORAGE 审中-公开

    公开(公告)号:US20170090791A1

    公开(公告)日:2017-03-30

    申请号:US15256942

    申请日:2016-09-06

    Applicant: ARM LIMITED

    Abstract: A data storage device comprises an array of data storage elements arranged as multiple partitions each comprising two or more data storage elements, each data storage element being associated with a respective identifier which identifies a data item currently stored by that data storage element; a predictor configured to compare, for each partition, information derived from the identifiers associated with the data storage elements of that partition with information derived from an identifier associated with the required data item, to identify a subset of partitions that do not store the required data item; and a comparator configured to compare identifiers associated with data storage elements of one or more partitions with the identifier associated with the required data item, wherein any partitions in the subset of partitions are excluded from the test group of partitions.

    DETERMINATION OF BRANCH CONVERGENCE IN A SEQUENCE OF PROGRAM INSTRUCTION
    3.
    发明申请
    DETERMINATION OF BRANCH CONVERGENCE IN A SEQUENCE OF PROGRAM INSTRUCTION 有权
    在程序指令序列中确定分支合并

    公开(公告)号:US20160371067A1

    公开(公告)日:2016-12-22

    申请号:US15168368

    申请日:2016-05-31

    Applicant: ARM LIMITED

    CPC classification number: G06F8/41 G06F8/433 G06F8/456 G06F8/458 G06F8/52

    Abstract: A method of compiling a sequence of program instructions, a method of parallel execution of a sequence of program instructions and apparatuses and software supporting such methods are disclosed. The sequence of program instructions is analysed in terms of basic blocks forming a control flow graph and execution paths through that control flow graph are identified. When more than one execution path leads to a given basic block, or when a loop path is found leading from a given basic block back to the same basic block, a potential convergence point may be identified. A convergence marker is added to the computer program associated with the basic blocks identified in this way and then when the program is executed, the convergence markers found are used to trigger a determination of a subset of the multiple execution threads which are executed following that convergence marker.

    Abstract translation: 公开了一种编译程序指令序列的方法,并行执行程序指令序列和装置的方法以及支持这种方法的软件。 根据形成控制流程图的基本块分析程序指令的顺序,并且通过该控制流程图识别执行路径。 当多于一个执行路径导致给定的基本块时,或者当从给定的基本块返回到相同的基本块的循环路径被发现时,可以识别潜在的收敛点。 将收敛标记添加到与以这种方式识别的基本块相关联的计算机程序中,然后当程序被执行时,发现的收敛标记用于触发在该收敛之后执行的多个执行线程的子集的确定 标记。

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