公开(公告)号：US20190073241A1

公开(公告)日：2019-03-07

申请号：US16044747

申请日：2018-07-25

Applicant: ARM Limited

Inventor： Isidoros SIDERIS ,  Eugenia CORDERO-CRESPO ,  Amir KLEEN

IPC: G06F9/48 ,  G06F9/32 ,  G06F9/30 ,  G06F9/46

Abstract: An apparatus and method are provided for executing thread groups. The apparatus comprises scheduling circuitry for selecting for execution a first thread group from a plurality of thread groups, and thread processing circuitry that is responsive to the scheduling circuitry to execute active threads of the first thread group in dependence on a common program counter shared between the active threads. In response to an exit event occurring for the first thread group, the thread processing circuitry determines whether a program counter check condition is present, and this can be used to trigger program counter checking circuitry to perform a program counter check operation to update the common program counter and an active thread indication for the first thread group. The thread processing circuitry is provided with register storage in which program counter information for each thread of the first thread group can be stored, and the program counter checking circuitry is arranged to have access to that register storage when performing the program counter check operation. Further, the scheduling circuitry is arranged to select, for execution by the thread processing circuitry, a different thread group whilst awaiting performance of the program counter check operation by the program counter checking circuitry for the first thread group. This provides an area efficient mechanism for handling divergence and re-convergence of threads within thread groups, in a manner that avoids impacting performance.