公开(公告)号：US20230335537A1

公开(公告)日：2023-10-19

申请号：US17722252

申请日：2022-04-15

Applicant: Arm Limited

Inventor： Lokesh Kumar Saini ,  Amit Chhabra ,  Valerio Lanieri

IPC: H01L25/07 ,  H01L27/092

CPC classification number: H01L25/074 ,  H01L27/092

Abstract: Various implementations described herein are related to a device having a multi-transistor structure for use in circuit architecture. The multi-transistor structure may have a multi-transistor stack of at least one of N-type transistors or P-type transistors that are arranged in a multi-device stack configuration. Also, a physical layout of the multi-device stack configuration may provide a common-centroid configuration for process mismatch cancellation in at least one of the X-Y-Z axes.

公开(公告)号：US10199094B2

公开(公告)日：2019-02-05

申请号：US15619332

申请日：2017-06-09

Applicant: ARM Limited

Inventor： Ankur Goel ,  Saikat Kumar Banik ,  Lokesh Kumar Saini ,  Vivek Asthana

IPC: G11C11/412 ,  G11C11/419 ,  H01L23/528 ,  H01L27/11 ,  G11C11/418

Abstract: A circuit includes a memory cell with a bitline. A pulldown nMOSFET has a gate terminal connected to an output port of a logic gate, and a drain terminal connected to the first bitline. A write select line is connected to a second input port of the logic gate. A pullup pMOSFET has a gate terminal connected to the write select line, and a drain terminal connected to the bitline.

公开(公告)号：US20180358086A1

公开(公告)日：2018-12-13

申请号：US15619332

申请日：2017-06-09

Applicant: ARM Limited

Inventor： Ankur Goel ,  Saikat Kumar Banik ,  Lokesh Kumar Saini ,  Vivek Asthana

IPC: G11C11/419 ,  H01L23/528 ,  H01L27/11 ,  G11C11/418

CPC classification number: G11C11/419 ,  G11C11/418 ,  H01L23/528 ,  H01L27/1104

Abstract: A circuit includes a memory cell with a bitline. A pulldown nMOSFET has a gate terminal connected to an output port of a logic gate, and a drain terminal connected to the first bitline. A write select line is connected to a second input port of the logic gate. A pullup pMOSFET has a gate terminal connected to the write select line, and a drain terminal connected to the bitline.