公开(公告)号：US09324163B2

公开(公告)日：2016-04-26

申请号：US13906120

申请日：2013-05-30

Applicant: ARM Limited

Inventor： Oskar Flordal

IPC: G06T15/40 ,  G06T9/00

CPC classification number: G06T9/00

Abstract: A tile-based graphics processing system 3 has a write out stage 31 configured to compress depth data by dividing each depth value to be compressed into plural parts, forming plural depth data channels by associating corresponding ones of the plural parts of different depth values with each other and applying a data compression scheme separately to each depth data channel to be compressed in order to produce compressed representations of the depth data channels. The compressed representations of the depth data channels are written to external memory 34.

Abstract translation: 基于瓦片的图形处理系统3具有写出级31，其被配置为通过将要压缩的每个深度值分割成多个部分来压缩深度数据，通过将不同深度值的多个部分中的相应的部分与每个深度值相关联来形成多个深度数据通道 另一个并且将数据压缩方案分别应用于要压缩的每个深度数据信道，以便产生深度数据信道的压缩表示。 深度数据通道的压缩表示被写入外部存储器34。

公开(公告)号：US09349156B2

公开(公告)日：2016-05-24

申请号：US13898510

申请日：2013-05-21

Applicant: ARM LIMITED

Inventor： Daren Croxford ,  Simon Jones ,  Oskar Flordal

IPC: G06T9/00 ,  G06T1/60 ,  G09G5/393 ,  G09G5/391 ,  G09G5/395

CPC classification number: G06T1/60 ,  G09G5/391 ,  G09G5/393 ,  G09G5/395 ,  G09G2330/021 ,  G09G2340/02

Abstract: Image data is subject to compression and decompression when it is respectively written to and read from a frame buffer. If a portion of the image data is identified as static (subject to less than a threshold amount of change for greater than a threshold time), then compression control parameters used for compression of that portion of the image are adjusted so as to increase the compression ratio achieved, hold the degree of lossiness substantially constant and increase the energy consumed while compressing that portion. The increased energy consumption during this high compression ratio compression is likely compensated for by a reduction in energy subsequently consumed when writing that frame-buffer image data to the frame buffer and reading that frame-buffer image data multiple times from the frame buffer. The compression characteristics varied may be to increase the block size used in the compression. Other variations in compression applied may be to change from single-pass compression to multi-pass compression, switch compression on and off altogether, or reorder the data when it has been compressed so as to match the order it will be read and so achieve support for longer read burst.

Abstract translation: 当图像数据被分别写入帧缓冲器并从帧缓冲器读取时，其被压缩和解压缩。 如果图像数据的一部分被识别为静态（经受小于阈值的变化量大于阈值时间），则调整用于压缩该部分图像的压缩控制参数，以便增加压缩 比率达到，保持损耗程度基本上恒定，并增加在压缩该部分时消耗的能量。 在该高压缩比压缩期间增加的能量消耗可能通过将帧缓冲器图像数据写入帧缓冲器并从帧缓冲器多次读取该帧缓冲器图像数据而随后消耗的能量的减少来补偿。 压缩特性变化可能是增加在压缩中使用的块尺寸。 压缩应用的其他变化可能是从单程压缩转换为多遍压缩，完全切换压缩，或者在压缩数据时重新排序数据，以便匹配读取的顺序，从而实现支持 更长的读取脉冲串。

公开(公告)号：US20140372722A1

公开(公告)日：2014-12-18

申请号：US13916722

申请日：2013-06-13

Applicant: ARM Limited

Inventor： Oskar Flordal ,  Hakan Persson ,  Andreas Engh-Halstvedt

IPC: G06F12/02

CPC classification number: G06F12/02 ,  G06F9/5016 ,  G06F12/0284 ,  G06T1/60

Abstract: A processing system comprises plural processing cores and a task allocator for allocating tasks to the processing cores. The processing cores perform the tasks that are allocated to them so as to produce results for the tasks, the results being stored by the processing cores in a buffer. The task allocator indicates to the processing cores memory portions within the buffer in which to store the results. When the processing cores determine that a given memory portion is becoming full, the processing cores request that the task allocator indicates a new memory portion in which to store its results. The processing system allows the task allocator to dynamically and efficiently allocate memory portions to plural processing cores without the task allocator 40 needing to know the sizes of the results being produced by the processing cores.

Abstract translation: 处理系统包括多个处理核和用于将任务分配给处理核的任务分配器。 处理核心执行分配给它们的任务，以产生任务的结果，结果由处理核心存储在缓冲区中。 任务分配器向处理核心指示缓冲器内存储结果的内存部分。 当处理核心确定给定的存储器部分变满时，处理核心请求任务分配器指示在其中存储其结果的新的存储器部分。 处理系统允许任务分配器动态且有效地将存储器部分分配给多个处理核，而任务分配器40需要知道由处理核产生的结果的大小。

公开(公告)号：US10068309B2

公开(公告)日：2018-09-04

申请号：US15254079

申请日：2016-09-01

Applicant: ARM LIMITED

Inventor： Jakob Axel Fries ,  Henrik Nils-Sture Olsson ,  Oskar Flordal ,  Sharjeel Saeed

IPC: G06T1/20 ,  G06T1/60 ,  H04N19/426 ,  H04N19/436

Abstract: An interface apparatus and method of operating the same are provided. The interface apparatus receives an uncompressed image data read request using a first addressing scheme at a first bus interface and transmits a compressed image data read request using a second addressing scheme from a second bus interface. Address translation circuitry translates between the first addressing scheme and the second addressing scheme. Decoding circuitry decodes a set of compressed image data received via the second bus interface to generate the set of uncompressed image data which is then transmitted via the first bus interface. The use of a second addressing scheme and image data compression is thus transparent to the source of the uncompressed image data read request, and the interface apparatus can therefore be used to connect devices which use different addressing schemes and image data formats, without either needing to be modified.

公开(公告)号：US09612949B2

公开(公告)日：2017-04-04

申请号：US13916722

申请日：2013-06-13

Applicant: ARM Limited

Inventor： Oskar Flordal ,  Hakan Persson ,  Andreas Engh-Halstvedt

IPC: G06F12/00 ,  G06F12/02 ,  G06F9/50 ,  G06T1/60

CPC classification number: G06F12/02 ,  G06F9/5016 ,  G06F12/0284 ,  G06T1/60

Abstract: A processing system comprises plural processing cores and a task allocator for allocating tasks to the processing cores. The processing cores perform the tasks that are allocated to them so as to produce results for the tasks, the results being stored by the processing cores in a buffer. The task allocator indicates to the processing cores memory portions within the buffer in which to store the results. When the processing cores determine that a given memory portion is becoming full, the processing cores request that the task allocator indicates a new memory portion in which to store its results. The processing system allows the task allocator to dynamically and efficiently allocate memory portions to plural processing cores without the task allocator 40 needing to know the sizes of the results being produced by the processing cores.

公开(公告)号：US20140354641A1

公开(公告)日：2014-12-04

申请号：US13906120

申请日：2013-05-30

Applicant: ARM Limited

Inventor： Oskar Flordal

IPC: G06T15/40

CPC classification number: G06T9/00

Abstract: A tile-based graphics processing system 3 has a write out stage 31 configured to compress depth data by dividing each depth value to be compressed into plural parts, forming plural depth data channels by associating corresponding ones of the plural parts of different depth values with each other and applying a data compression scheme separately to each depth data channel to be compressed in order to produce compressed representations of the depth data channels. The compressed representations of the depth data channels are written to external memory 34.

Abstract translation: 基于瓦片的图形处理系统3具有写出级31，其被配置为通过将要压缩的每个深度值分割成多个部分来压缩深度数据，通过将不同深度值的多个部分中的相应的部分与每个深度值相关联来形成多个深度数据通道 另一个并且将数据压缩方案分别应用于要压缩的每个深度数据信道，以便产生深度数据信道的压缩表示。 深度数据通道的压缩表示被写入外部存储器34。