公开(公告)号：US10475147B2

公开(公告)日：2019-11-12

申请号：US15428645

申请日：2017-02-09

Applicant: Arm Limited

Inventor： Steven John Price ,  Hakan Lars-Goran Persson ,  Ian Victor Devereux ,  Jussi Tuomas Pennala

IPC: G06T1/20 ,  G06T1/60 ,  G06F9/50

Abstract: A graphics processing system comprises a pair of graphics processing units that are connected to each other via communications bridges that can allow communication between the connected graphics processing units. One of the graphics processing units is operable to act as a master graphics processing unit controlling graphics processing operations on the other graphics processing unit which is operable as a slave graphics processing unit to perform graphics processing operations under the control of the master graphics processing unit. Each graphics processing unit of the pair of graphics processing units is also capable of operating in a standalone mode, in which the graphics processing unit operates independently of the other graphics processing unit to perform a graphics processing task.

公开(公告)号：US10719632B2

公开(公告)日：2020-07-21

申请号：US15246949

申请日：2016-08-25

Applicant: ARM Limited

Inventor： Håkan Lars-Göran Persson ,  Steven John Price ,  Thomas James Cooksey

IPC: G06F21/74 ,  G06F21/75 ,  G06F21/70 ,  G06F21/71 ,  H04L9/00 ,  G06F9/48 ,  G06F9/50 ,  C09D11/50 ,  C09B67/02 ,  G06F21/14 ,  G06F21/12 ,  G06F21/55 ,  G06F21/50 ,  G06F21/60 ,  G06F12/14 ,  H04L9/06 ,  G06F9/46 ,  G06T1/20

Abstract: A data processing system includes a host processor that executes an operating system and an accelerator operable to process data under the control of the operating system executing on the host processor. The accelerator can be switched between a normal mode of operation and a protected mode of operation in which the side channel information that can be provided by the accelerator to the host processor is restricted. The data processing system also includes a mechanism for switching the accelerator from its normal mode of operation to the protected mode of operation, and from its protected mode of operation to the normal mode of operation.

公开(公告)号：US20170060637A1

公开(公告)日：2017-03-02

申请号：US15246949

申请日：2016-08-25

Applicant: ARM Limited

Inventor： Håkan Lars-Göran Persson ,  Steven John Price ,  Thomas James Cooksey

IPC: G06F9/50 ,  G06T1/20 ,  G06F9/46

Abstract: A data processing system includes a host processor that executes an operating system and an accelerator operable to process data under the control of the operating system executing on the host processor. The accelerator can be switched between a normal mode of operation and a protected mode of operation in which the side channel information that can be provided by the accelerator to the host processor is restricted. The data processing system also includes a mechanism for switching the accelerator from its normal mode of operation to the protected mode of operation, and from its protected mode of operation to the normal mode of operation.

Abstract translation: 数据处理系统包括执行操作系统的主处理器和可操作以在主处理器上执行的操作系统的控制下处理数据的加速器。 加速器可以在正常操作模式和保护操作模式之间切换，其中加速器可以向主机处理器提供的侧信道信息被限制。 数据处理系统还包括用于将加速器从其正常操作模式切换到保护操作模式以及从保护操作模式到正常操作模式的机制。