公开(公告)号：US20220159286A1

公开(公告)日：2022-05-19

申请号：US17587497

申请日：2022-01-28

Applicant: ATI Technologies ULC

Inventor： Ahmed M. Abdelkhalek ,  Edward A. Harold ,  Andy Sung ,  Stephen Ho ,  Lei Zhang ,  Ihab Amer ,  Gabor Sines ,  Zhiqi Hao ,  Yang Liu ,  Baochun Li ,  Kai Sun

IPC: H04N19/463 ,  H04N19/593 ,  H04N19/152

Abstract: Systems, apparatuses, and methods for reducing latency when consuming an encoded video bitstream in real-time are disclosed. A video encoder encodes a video bitstream and writes chunks of the encoded bitstream to a bitstream buffer. Prior to the encoder completing the encoding of an entire frame, or an entire slice of a frame, a consumer module consumes encoded chunks of the bitstream. In one implementation, to enable pipelining of the consumption with the encoding, the encoder updates a buffer write pointer with an indication of the amount of data that has been written to the bitstream buffer. The consumer module retrieves encoded data from the bitstream buffer up to the location indicated by the buffer write pointer. In this way, the consumer module is able to access and consume encoded video data prior to the encoder finishing encoding an entire frame or an entire slice of the frame.

公开(公告)号：US11252429B2

公开(公告)日：2022-02-15

申请号：US15965281

申请日：2018-04-27

Applicant: ATI Technologies ULC

Inventor： Ahmed M. Abdelkhalek ,  Edward A. Harold ,  Andy Sung ,  Stephen Ho ,  Lei Zhang ,  Ihab Amer ,  Gabor Sines ,  Zhiqi Hao ,  Yang Liu ,  Baochun Li ,  Kai Sun

IPC: H04N19/463 ,  H04N19/593 ,  H04N19/152

Abstract: Systems, apparatuses, and methods for reducing latency when consuming an encoded video bitstream in real-time are disclosed. A video encoder encodes a video bitstream and writes chunks of the encoded bitstream to a bitstream buffer. Prior to the encoder completing the encoding of an entire frame, or an entire slice of a frame, a consumer module consumes encoded chunks of the bitstream. In one implementation, to enable pipelining of the consumption with the encoding, the encoder updates a buffer write pointer with an indication of the amount of data that has been written to the bitstream buffer. The consumer module retrieves encoded data from the bitstream buffer up to the location indicated by the buffer write pointer. In this way, the consumer module is able to access and consume encoded video data prior to the encoder finishing encoding an entire frame or an entire slice of the frame.

公开(公告)号：US20190335189A1

公开(公告)日：2019-10-31

申请号：US15965281

申请日：2018-04-27

Applicant: ATI Technologies ULC

Inventor： Ahmed M. Abdelkhalek ,  Edward A. Harold ,  Andy Sung ,  Stephen Ho ,  Lei Zhang ,  Ihab Amer ,  Gabor Sines ,  Zhiqi Hao ,  Yang Liu ,  Baochun Li ,  Kai Sun

IPC: H04N19/463 ,  H04N19/152 ,  H04N19/593

Abstract: Systems, apparatuses, and methods for reducing latency when consuming an encoded video bitstream in real-time are disclosed. A video encoder encodes a video bitstream and writes chunks of the encoded bitstream to a bitstream buffer. Prior to the encoder completing the encoding of an entire frame, or an entire slice of a frame, a consumer module consumes encoded chunks of the bitstream. In one implementation, to enable pipelining of the consumption with the encoding, the encoder updates a buffer write pointer with an indication of the amount of data that has been written to the bitstream buffer. The consumer module retrieves encoded data from the bitstream buffer up to the location indicated by the buffer write pointer. In this way, the consumer module is able to access and consume encoded video data prior to the encoder finishing encoding an entire frame or an entire slice of the frame.

公开(公告)号：US20240223768A1

公开(公告)日：2024-07-04

申请号：US18089928

申请日：2022-12-28

Applicant: ATI TECHNOLOGIES ULC

Inventor： Yuxin Chen ,  Ying Luo ,  Edward Harold ,  Shu-Hsien Wu ,  Xinghai Li ,  Razvan F. Dan-Dobre ,  Min Wang ,  Jianbin Xiao ,  Amal Khailtash ,  Yin Xia Yang ,  Kai Sun

IPC: H04N19/137 ,  H04N19/105 ,  H04N19/176 ,  H04N19/53

CPC classification number: H04N19/137 ,  H04N19/105 ,  H04N19/176 ,  H04N19/53

Abstract: The present disclosure provides techniques for implementing a hierarchical and partitional integer motion estimation search (IMES) architecture using a search engine that is configurable based on a content of a plurality of frames in a video sequence. For example, the techniques include identifying, based on the plurality of frames, one or more search parameters for the hierarchical and partitional motion estimation, where the one or more search parameters are based on a content indicative of motion features tracked across the video sequence. The hierarchical and partitional motion estimation, which includes at least one decimated motion estimation search followed by a full-pixel level search, is performed based on the one or more identified search parameters to determine an integer (or pixel-level) motion vector.