公开(公告)号：US20220336523A1

公开(公告)日：2022-10-20

申请号：US17721640

申请日：2022-04-15

Applicant: AU OPTRONICS CORPORATION

Inventor： Chia-Ting HSIEH ,  Chien-Fu HUANG ,  Cheng-Nan YEH ,  Seok-Lyul LEE ,  Yung-Hsiang LAN ,  June-Woo LEE ,  Sung-Yu SU ,  Hsien-Chun WANG ,  Ya-Jung WANG ,  Hsin-Ying LIN ,  Yu-Chieh LIN ,  Yang-En WU

IPC: H01L27/15 ,  G09G3/32

Abstract: The present disclosure provides a semiconductor device, including a buffer layer, a first sub-chip and a second sub-chip, and a connecting element. The first sub-chip and the second sub-chip are separately arranged on the buffer layer. Each of the first sub-chip and the second sub-chip includes a first diffusion layer, an active layer, and a second diffusion layer. The first diffusion layer, the active layer, and the second diffusion layer are sequentially arranged on the buffer layer in a top-down approach. The first diffusion layer and the buffer layer are first-type epitaxial layers, and the second diffusion layer is a second-type epitaxial layer. The connecting element is configured to couple the second diffusion layer of the first sub-chip and the first diffusion layer of the second sub-chip.

公开(公告)号：US20160314754A1

公开(公告)日：2016-10-27

申请号：US14995384

申请日：2016-01-14

Applicant: AU Optronics Corporation

Inventor： Ching-Huan LIN ,  Chia-Ting HSIEH ,  Norio SUGIURA ,  Fang-Chen LUO

IPC: G09G3/36

CPC classification number: G09G3/3659 ,  G09G2300/0852

Abstract: A pixel includes a voltage dividing unit, a LC capacitor, a control unit, a first capacitor, a writing-in unit, and an adjusting unit. First terminal of the voltage dividing unit receives a first power voltage. The control terminal of the voltage dividing unit receives a first control signal. The LC capacitor is electrically coupled to the second terminal of voltage dividing unit. The control terminal of the control unit receives a second control signal. The writing-in unit provides a first pixel data signal to the first capacitor based on a third control signal. The adjusting unit receives a second power voltage. The adjusting unit divides voltage difference between the first and second power voltages based on the first pixel data signal stored in the first capacitor so as to control voltage stored in the LC capacitor, such that the LC corresponding to LC capacitor can be controlled.

Abstract translation: 像素包括分压单元，LC电容器，控制单元，第一电容器，写入单元和调整单元。 分压单元的第一端子接收第一电源电压。 分压单元的控制端接收第一控制信号。 LC电容器电耦合到分压单元的第二端子。 控制单元的控制端接收第二控制信号。 写入单元基于第三控制信号向第一电容器提供第一像素数据信号。 调节单元接收第二电源电压。 调整单元基于存储在第一电容器中的第一像素数据信号来分压第一和第二电源电压之间的电压差，以便控制存储在LC电容器中的电压，使得可以控制对应于LC电容器的LC。

公开(公告)号：US20220336425A1

公开(公告)日：2022-10-20

申请号：US17723856

申请日：2022-04-19

Applicant: AU OPTRONICS CORPORATION

Inventor： June-Woo LEE ,  Yang-En WU ,  Sung-Yu SU ,  Hsien-Chun WANG ,  Ya-Jung WANG ,  Chia-Ting HSIEH ,  Chien-Fu HUANG ,  Hsin-Ying LIN

IPC: H01L25/075 ,  H01L33/38 ,  H01L33/62

Abstract: The present disclosure provides a light emitting diode component, including a body and a plurality of P-N diode structures. The P-N diode structures are coupled in series and integrated on the body. The P-N diode structures include a plurality of p-type doping layers and a plurality of n-type doping layers. The p-type doping layer of a first P-N diode structure in the P-N diode structures is electrically coupled to the n-type doping layer of a second P-N diode structure in the P-N diode structures.

公开(公告)号：US20180122319A1

公开(公告)日：2018-05-03

申请号：US15854139

申请日：2017-12-26

Applicant: AU Optronics Corporation

Inventor： Ching-Huan LIN ,  Chia-Ting HSIEH ,  Norio SUGIURA ,  Fang-Chen LUO

IPC: G09G3/36

CPC classification number: G09G3/3659 ,  G09G2300/0852

Abstract: A pixel includes a voltage dividing unit, a LC capacitor, a control unit, a first capacitor, a writing-in unit, and an adjusting unit. First terminal of the voltage dividing unit receives a first power voltage. The control terminal of the voltage dividing unit receives a first control signal. The LC capacitor is electrically coupled to the second terminal of voltage dividing unit. The control terminal of the control unit receives a second control signal. The writing-in unit provides a first pixel data signal to the first capacitor based on a third control signal. The adjusting unit receives a second power voltage. The adjusting unit divides voltage difference between the first and second power voltages based on the first pixel data signal stored in the first capacitor so as to control voltage stored in the LC capacitor, such that the LC corresponding to LC capacitor can be controlled.

公开(公告)号：US20170352319A1

公开(公告)日：2017-12-07

申请号：US15592719

申请日：2017-05-11

Applicant: AU OPTRONICS CORPORATION

Inventor： Tokuro OZAWA ,  Koji AOKI ,  Chia-Che HUNG ,  Chia-Wei KUO ,  Chia-Ting HSIEH ,  Bo-Shiang TZENG

IPC: G09G3/36

CPC classification number: G09G3/3648 ,  G09G3/3659 ,  G09G3/3677 ,  G09G3/3688 ,  G09G2300/0465 ,  G09G2300/0852 ,  G09G2310/0205 ,  G09G2310/0251 ,  G09G2310/061 ,  G09G2330/021

Abstract: A pixel circuit includes a display unit, a driving unit, a reset unit, a data unit, and a storage unit. The display unit is electrically coupled to a first supply voltage source. The driving unit has one end electrically coupled to the display unit and has another end electrically coupled to a second supply voltage source. The driving unit charges the display unit. The reset unit is electrically coupled to the driving unit and the display unit, and provides a reset voltage to an operating node between the driving unit and the display unit. The data unit is electrically coupled to the driving unit and provides a data voltage to the driving unit. The storage unit stores a voltage difference between the operating node and a data node between the data unit and the driving unit.