公开(公告)号：US20200226974A1

公开(公告)日：2020-07-16

申请号：US16683505

申请日：2019-11-14

Applicant: AU OPTRONICS CORPORATION

Inventor： Mao-Hsun Cheng ,  Cheng-Han Huang ,  Mei-Sheng Ma ,  Yi-Chiung Chen ,  Hsiang-Sheng Chang ,  Po-Jung Wu ,  Yung-Chih Chen ,  Ching-Sheng Cheng

IPC: G09G3/32

Abstract: A pixel driving circuit includes a driving unit receiving a first control signal via a first control end, and the driving unit is biased according to the first control signal to provide a driving current to a light emitting element. One end of a capacitor is connected to a second control end of the driving unit, and the other end of the capacitor is connected to a first end or a second end of the driving unit. A compensation unit receives a second control signal via a first control end, and the compensation unit is biased according to the second control signal. A first switch unit receives a third control signal via a control end, and thereby the first switch unit is turned on. A second switch unit receives a fourth control signal via a control end, and thereby the second switch unit is turned on. A third switch unit receives a third control signal or a fourth control signal via a control end, and thereby the third switch uni

公开(公告)号：US10019956B2

公开(公告)日：2018-07-10

申请号：US15139827

申请日：2016-04-27

Applicant: AU OPTRONICS CORPORATION

Inventor： Chun-Da Tu ,  Yung-Chih Chen ,  Cheng-Han Huang ,  Kai-Wei Hong ,  Hsiang-Sheng Chang ,  Chuang-Cheng Yang

IPC: G11C19/00 ,  G09G3/36 ,  G11C19/28

CPC classification number: G09G3/3648 ,  G09G3/3677 ,  G09G2300/0408 ,  G09G2310/0286 ,  G09G2310/08 ,  G09G2320/0214 ,  G11C19/28

Abstract: A shift register including a voltage set unit, a driver unit, a control unit, a first transistor, a second transistor, a third transistor and a fourth transistor is provided. The voltage set unit provides a terminal voltage. The driver unit provides a main gate signal according to the terminal voltage and a clock signal. The control unit provides a control signal. The first transistor receives the terminal voltage, a level reference voltage and the control signal. The second transistor is coupled to the first transistor and receives a low voltage and the control signal. The third transistor receives the terminal voltage, a level reference voltage and a gate reference signal. The fourth transistor is coupled to the third transistor and receives the low voltage and the gate reference signal.

公开(公告)号：US20170124971A1

公开(公告)日：2017-05-04

申请号：US15139827

申请日：2016-04-27

Applicant: AU OPTRONICS CORPORATION

Inventor： Chun-Da Tu ,  Yung-Chih Chen ,  Cheng-Han Huang ,  Kai-Wei Hong ,  Hsiang-Sheng Chang ,  Chuang-Cheng Yang

IPC: G09G3/36 ,  G11C19/28

CPC classification number: G09G3/3648 ,  G09G3/3677 ,  G09G2300/0408 ,  G09G2310/0286 ,  G09G2310/08 ,  G09G2320/0214 ,  G11C19/28

Abstract: A shift register including a voltage set unit, a driver unit, a control unit, a first transistor, a second transistor, a third transistor and a fourth transistor is provided. The voltage set unit provides a terminal voltage. The driver unit provides a main gate signal according to the terminal voltage and a clock signal. The control unit provides a control signal. The first transistor receives the terminal voltage, a level reference voltage and the control signal. The second transistor is coupled to the first transistor and receives a low voltage and the control signal. The third transistor receives the terminal voltage, a level reference voltage and a gate reference signal. The fourth transistor is coupled to the third transistor and receives the low voltage and the gate reference signal.