公开(公告)号：US09425218B2

公开(公告)日：2016-08-23

申请号：US14287727

申请日：2014-05-27

Applicant: AU Optronics Corporation

Inventor： Wan-Heng Chang ,  Hsiao-Wei Cheng ,  Shih-Chyuan Fan Jiang

IPC: G02F1/1343 ,  H01L27/12

CPC classification number: H01L27/124 ,  G02F1/134363

Abstract: A pixel structure disposed on a first substrate is provided. The pixel structure includes a scan line, a data line, an active component, a pixel electrode, a first dielectric layer, a common electrode, and a protrusion. The scan line and the data line are disposed on the first substrate. The pixel electrode is disposed on the first substrate. The first dielectric layer is disposed on the first substrate and covers the pixel electrode. The common electrode is disposed on the first dielectric layer, and the common electrode has at least two first branched electrodes and a first opening between the first branched electrodes. The first branched electrodes and the first opening on the first substrate overlap with the pixel electrode in a projection direction. The protrusion is disposed on the first dielectric layer, and the protrusion is disposed in the first opening between the first branched electrodes.

Abstract translation: 设置在第一基板上的像素结构。 像素结构包括扫描线，数据线，有源部件，像素电极，第一电介质层，公共电极和突起。 扫描线和数据线设置在第一基板上。 像素电极设置在第一基板上。 第一介电层设置在第一基板上并覆盖像素电极。 公共电极设置在第一电介质层上，公共电极具有至少两个第一分支电极和第一分支电极之间的第一开口。 第一分支电极和第一基板上的第一开口在投影方向与像素电极重叠。 突起设置在第一电介质层上，并且突起设置在第一分支电极之间的第一开口中。

公开(公告)号：US10073307B1

公开(公告)日：2018-09-11

申请号：US15802389

申请日：2017-11-02

Applicant: Au Optronics Corporation

Inventor： Wan-Heng Chang ,  Sung-Yu Su

IPC: G02F1/1343

CPC classification number: G02F1/134336 ,  G02F1/133707 ,  G02F1/134309 ,  G02F2001/134345 ,  G02F2001/134372

Abstract: A liquid crystal display panel including first and second substrates, a sub-pixel row, first and second control electrodes is provided. The sub-pixel row is disposed on the first substrate and includes first, second and third sub-pixels arranged in sequence along a first direction, the polarity of the first sub-pixel and the polarity of third sub-pixel are the same, the polarity of the second sub-pixel is different from the polarities of the first and third sub-pixels, each of the first to third sub-pixels has a first region and a second region arranged along a second direction, and includes an electrode having a first slit pattern and a second slit pattern respectively located in the first region and the second region, wherein the extending direction of the first slit pattern is different from that of the second slit pattern, and the extending directions of the first slit patterns of two adjacent electrodes are different. The first and second control electrodes having different polarities are disposed on the second substrate and respectively overlap the first and the second regions.

公开(公告)号：US09165946B1

公开(公告)日：2015-10-20

申请号：US14487658

申请日：2014-09-16

Applicant: AU Optronics Corporation

Inventor： Wan-Heng Chang ,  Hsiao-Wei Cheng ,  Shih-Chyuan Fan Jiang

IPC: H01L27/14 ,  H01L27/12 ,  H01L29/786

CPC classification number: H01L27/124 ,  G02F1/133345 ,  G02F1/134363 ,  G02F2001/134372 ,  H01L27/1218 ,  H01L27/1248

Abstract: An array substrate includes a scan line, a data line, a thin film transistor, a first transparent electrode, a passivation layer, and a second transparent electrode. The scan line and the data line interlace to define a pixel region. The gate dielectric layer of the thin film transistor overlaps the scan line and the data line and extends to cover the pixel region. The gate dielectric layer has a first region, a second region, and a third region. The first region corresponds to the semiconductor layer of the thin film transistor. The second region connects the first region and the third region. The thickness of the second region is different from that of the third region. The first transparent electrode covers the gate dielectric layer in the pixel region. The passivation layer covers the thin film transistor and the first transparent electrode. The second transparent electrode covers the passivation layer.

Abstract translation: 阵列基板包括扫描线，数据线，薄膜晶体管，第一透明电极，钝化层和第二透明电极。 扫描线和数据线交织以定义像素区域。 薄膜晶体管的栅极电介质层与扫描线和数据线重叠，并延伸以覆盖像素区域。 栅介质层具有第一区域，第二区域和第三区域。 第一区域对应于薄膜晶体管的半导体层。 第二区域连接第一区域和第三区域。 第二区域的厚度与第三区域的厚度不同。 第一透明电极覆盖像素区域中的栅介质层。 钝化层覆盖薄膜晶体管和第一透明电极。 第二透明电极覆盖钝化层。

公开(公告)号：US20210056889A1

公开(公告)日：2021-02-25

申请号：US16828928

申请日：2020-03-24

Applicant: Au Optronics Corporation

Inventor： Hsien-Chun Wang ,  Ya-Jung Wang ,  Jing-Wun Jhang ,  Chen-Feng Fan ,  Wan-Heng Chang ,  Sung-Yu Su

IPC: G09G3/32

Abstract: A pixel circuit includes a light-emitting device, a first transistor, a second transistor, a first capacitor, a third transistor, a fourth transistor, and a fifth transistor. The first transistor and the fourth transistor are controlled by a light-emitting signal. The third transistor and the fifth transistor are controlled by a scan signal. The light-emitting device, the first transistor, the second transistor, the fourth transistor, and the fifth transistor are serially connected between a system high voltage and a system low voltage. The third transistor is coupled between a data signal and a control terminal of the first transistor. The first capacitor is coupled between a control terminal and a downstream terminal of the second transistor. The fifth transistor is coupled between the downstream terminal of the second transistor and a charging reference voltage. A current of the charging reference voltage is less than a current of the system low voltage.

公开(公告)号：US10216017B2

公开(公告)日：2019-02-26

申请号：US15393954

申请日：2016-12-29

Applicant: AU OPTRONICS CORPORATION

Inventor： Wan-Heng Chang ,  Chen-Feng Fan ,  Rong-Fu Lin ,  Sung-Yu Su ,  Hsiao-Wei Cheng

IPC: G02F1/13 ,  G02F1/1333 ,  G02F1/1335 ,  G02F1/1337 ,  G02F1/1343 ,  G02F1/1347

Abstract: A liquid crystal display panel includes a first substrate, a second substrate, a third substrate, a pixel electrode layer, a first common electrode layer, a first control electrode layer, a first liquid crystal layer, a second common electrode layer, a second control electrode layer and a second liquid crystal layer. The second substrate is opposite to the first substrate. The third substrate is opposite to the second substrate. The pixel electrode layer and the first common electrode layer are disposed on the first substrate. The first control electrode layer is disposed on the second substrate. The first liquid crystal layer is disposed between the first substrate and the second substrate. The second common electrode layer is disposed on the second substrate. The second control electrode layer is disposed on the third substrate. The second liquid crystal layer is disposed between the second substrate and the third substrate.

公开(公告)号：US20190213967A1

公开(公告)日：2019-07-11

申请号：US16239686

申请日：2019-01-04

Applicant: AU OPTRONICS CORPORATION

Inventor： Peng-Bo Xi ,  Sung-Yu Su ,  Chen-Feng Fan ,  Wan-Heng Chang

IPC: G09G3/36

CPC classification number: G09G3/3648 ,  G09G2300/0478 ,  G09G2300/0871 ,  G09G2320/0252

Abstract: A pixel circuit includes a storage capacitor, a first switch, and a second switch. The first switch is electrically connected to a first end of the storage capacitor, and configured to provide a data voltage to the first end of the storage capacitor according to a gate signal. The second switch is electrically connected between the first end of the storage capacitor and a second end of the storage capacitor, and configured to receive a first operating voltage from the second end of the storage capacitor and provide the first operating voltage to the first end of the storage capacitor.

公开(公告)号：US10274764B2

公开(公告)日：2019-04-30

申请号：US15945203

申请日：2018-04-04

Applicant: AU OPTRONICS CORPORATION

Inventor： Wan-Heng Chang ,  Chen-Feng Fan ,  Sung-Yu Su ,  Hsiao-Wei Cheng

IPC: G02F1/13 ,  G02F1/133 ,  G02F1/1335 ,  G02F1/1343 ,  G06F3/041 ,  G09G3/36 ,  G06F3/044 ,  G02F1/1333 ,  G02F1/1362 ,  G02F1/1368

Abstract: A liquid crystal display panel includes first and second substrates, first pixel electrodes, second pixel electrodes, common electrodes, first auxiliary electrodes, and a liquid crystal layer. The second substrate is disposed opposite to the first substrate. The liquid crystal layer is disposed between the first and the second substrates. The first pixel electrodes, the second pixel electrodes, and the common electrodes are disposed on the first substrate. The first auxiliary electrodes are disposed on the second substrate. One of the first pixel electrodes is not overlapping one of the first auxiliary electrodes in a vertical projection direction and overlapping one of the common electrodes in the vertical projection direction. A driving method of the liquid crystal display panel includes setting a first voltage difference in a wide viewing mode and a second voltage difference in a narrow viewing mode between the first auxiliary electrodes and the common electrodes.

公开(公告)号：US09223180B2

公开(公告)日：2015-12-29

申请号：US13798607

申请日：2013-03-13

Applicant: AU Optronics Corporation

Inventor： Wan-Heng Chang ,  Hsiao-Wei Cheng ,  Shih-Chyuan Fan Jiang

IPC: G02F1/1343

CPC classification number: G02F1/134309 ,  G02F1/133345 ,  G02F1/134363 ,  G02F1/136286 ,  G02F1/1368 ,  G02F2001/134372 ,  G02F2201/121

Abstract: A Fringe-Field Switching (FFS) mode liquid crystal display (LCD) panel with optimized designs of pixel areas and/or liquid crystal materials is provided. The FFS mode LCD panel includes an active-element array substrate with a plurality of pixel areas, an opposite substrate, and a liquid crystal layer. Each pixel area comprises a plurality of first common electrodes, a second common electrode between the pixel area and another horizontally adjacent pixel area, and a pixel electrode. The optical transmittance and homogeneity of the pixel area of the display panel are modified by manipulating the relative position of the electrodes in the pixel areas on the active-element array substrate and/or adopting specific parameters of liquid crystal materials in the liquid crystal layer of the display panel.

Abstract translation: 提供了具有优化的像素区域和/或液晶材料设计的边缘场切换（FFS）模式液晶显示（LCD）面板。 FFS模式LCD面板包括具有多个像素区域的有源元件阵列基板，相对基板和液晶层。 每个像素区域包括多个第一公共电极，像素区域和另一个水平相邻像素区域之间的第二公共电极和像素电极。 通过操纵有源元件阵列基板上的像素区域中的电极的相对位置和/或在液晶层的液晶层中采用液晶材料的特定参数来修改显示面板的像素区域的光透射率和均匀性 显示面板。

公开(公告)号：US11011105B2

公开(公告)日：2021-05-18

申请号：US16828928

申请日：2020-03-24

Applicant: Au Optronics Corporation

Inventor： Hsien-Chun Wang ,  Ya-Jung Wang ,  Jing-Wun Jhang ,  Chen-Feng Fan ,  Wan-Heng Chang ,  Sung-Yu Su

IPC: G09G3/32

Abstract: A pixel circuit includes a light-emitting device, a first transistor, a second transistor, a first capacitor, a third transistor, a fourth transistor, and a fifth transistor. The first transistor and the fourth transistor are controlled by a light-emitting signal. The third transistor and the fifth transistor are controlled by a scan signal. The light-emitting device, the first transistor, the second transistor, the fourth transistor, and the fifth transistor are serially connected between a system high voltage and a system low voltage. The third transistor is coupled between a data signal and a control terminal of the first transistor. The first capacitor is coupled between a control terminal and a downstream terminal of the second transistor. The fifth transistor is coupled between the downstream terminal of the second transistor and a charging reference voltage. A current of the charging reference voltage is less than a current of the system low voltage.

公开(公告)号：US10971093B2

公开(公告)日：2021-04-06

申请号：US16239686

申请日：2019-01-04

Applicant: AU OPTRONICS CORPORATION

Inventor： Peng-Bo Xi ,  Sung-Yu Su ,  Chen-Feng Fan ,  Wan-Heng Chang

IPC: G09G3/36

Abstract: A pixel circuit includes a storage capacitor, a first switch, and a second switch. The first switch is electrically connected to a first end of the storage capacitor, and configured to provide a data voltage to the first end of the storage capacitor according to a gate signal. The second switch is electrically connected between the first end of the storage capacitor and a second end of the storage capacitor, and configured to receive a first operating voltage from the second end of the storage capacitor and provide the first operating voltage to the first end of the storage capacitor.