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公开(公告)号:US11139737B2
公开(公告)日:2021-10-05
申请号:US16428900
申请日:2019-05-31
申请人: Active-Semi, Inc.
发明人: Masashi Nogawa
摘要: A voltage regulator control integrated circuit includes constituent parts including an error amplifier circuit, a comparator circuit, a compensation signal generator circuit, an oscillator/one-shot circuit, a latch, and a current sense circuit. In a first example, the integrated circuit is operable in a first mode and in a second mode. In the first mode, the various parts are configured and interconnected in such a way that they operate together as a valley current mode regulator control circuit. In the second mode, the various parts are configured and interconnected in such a way that they operate together as a current-mode constant on-time mode regulator control circuit. In another example, a voltage regulator control integrated circuit has the same basic constituent parts and is operable in a first mode as a peak current mode regulator control circuit, or in a second mode as a constant off-time time mode regulator control circuit.
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公开(公告)号:US20190288602A1
公开(公告)日:2019-09-19
申请号:US16428900
申请日:2019-05-31
申请人: Active-Semi, Inc.
发明人: Masashi Nogawa
摘要: A voltage regulator control integrated circuit includes constituent parts including an error amplifier circuit, a comparator circuit, a compensation signal generator circuit, an oscillator/one-shot circuit, a latch, and a current sense circuit. In a first example, the integrated circuit is operable in a first mode and in a second mode. In the first mode, the various parts are configured and interconnected in such a way that they operate together as a valley current mode regulator control circuit. In the second mode, the various parts are configured and interconnected in such a way that they operate together as a current-mode constant on-time mode regulator control circuit. In another example, a voltage regulator control integrated circuit has the same basic constituent parts and is operable in a first mode as a peak current mode regulator control circuit, or in a second mode as a constant off-time time mode regulator control circuit.
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公开(公告)号:US11381163B2
公开(公告)日:2022-07-05
申请号:US16528487
申请日:2019-07-31
申请人: Active-Semi, Inc.
发明人: Masashi Nogawa
摘要: A resonant charge pump circuit includes a resonant circuit having a bucket capacitor and a bucket inductor connected in series, and a switching circuit connected to the resonant circuit. The switching circuit switches to a first state that enables current to flow from an input terminal into the resonant circuit to charge the bucket capacitor and the bucket inductor, and switches to a second state that enables current to flow from the resonant circuit to discharge the bucket capacitor and the bucket inductor to an output terminal. The resonant circuit controls current flow into and out from the resonant circuit when the switching circuit switches between the states. The resonant charge pump circuit also includes a timing circuit that controls when the switching circuit switches between the states.
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公开(公告)号:US10320293B1
公开(公告)日:2019-06-11
申请号:US16179978
申请日:2018-11-04
申请人: Active-Semi, Inc.
发明人: Masashi Nogawa
CPC分类号: H02M3/157 , H02M1/08 , H02M1/44 , H02M3/156 , H02M3/158 , H02M2001/0009 , H02M2003/1566
摘要: A DC-to-DC converter employs peak current mode control and includes a cycle skipping prevent circuit. If a latch is set, then a high side switch is turned on. A comparator receives a signal indicative of current flow and a compensated error signal. The prevent circuit supplies a delayed version of a low duty cycle, fixed frequency, oscillator signal onto the set input lead of the latch. The prevent circuit gates a high signal as output by the comparator onto the reset input lead of the latch. If the output of the comparator has, however, not transitioned high by a predetermined time, then the prevent circuit gates a high pulse onto the reset input lead. Accordingly, the prevent circuit ensures that the latch is reset once every period of the signal SET. A cycle skipping prevent circuit is also disclosed for use in a converter that employs valley current mode control.
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公开(公告)号:US10122272B1
公开(公告)日:2018-11-06
申请号:US15859401
申请日:2017-12-30
申请人: Active-Semi, Inc.
发明人: Masashi Nogawa
摘要: A DC-to-DC converter employs peak current mode control and includes a cycle skipping prevent circuit. If a latch is set, then a high side switch is turned on. A comparator receives a signal indicative of current flow and a compensated error signal. The prevent circuit supplies a delayed version of a low duty cycle, fixed frequency, oscillator signal onto the set input lead of the latch. The prevent circuit gates a high signal as output by the comparator onto the reset input lead of the latch. If the output of the comparator has, however, not transitioned high by a predetermined time, then the prevent circuit gates a high pulse onto the reset input lead. Accordingly, the prevent circuit ensures that the latch is reset once every period of the signal SET. A cycle skipping prevent circuit is also disclosed for use in a converter that employs valley current mode control.
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公开(公告)号:US20200212797A1
公开(公告)日:2020-07-02
申请号:US16528487
申请日:2019-07-31
申请人: Active-Semi, Inc.
发明人: Masashi Nogawa
IPC分类号: H02M3/07
摘要: A resonant charge pump circuit includes a resonant circuit having a bucket capacitor and a bucket inductor connected in series, and a switching circuit connected to the resonant circuit. The switching circuit switches to a first state that enables current to flow from an input terminal into the resonant circuit to charge the bucket capacitor and the bucket inductor, and switches to a second state that enables current to flow from the resonant circuit to discharge the bucket capacitor and the bucket inductor to an output terminal. The resonant circuit controls current flow into and out from the resonant circuit when the switching circuit switches between the states. The resonant charge pump circuit also includes a timing circuit that controls when the switching circuit switches between the states.
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公开(公告)号:US20190207516A1
公开(公告)日:2019-07-04
申请号:US16179978
申请日:2018-11-04
申请人: Active-Semi, Inc.
发明人: Masashi Nogawa
CPC分类号: H02M3/157 , H02M1/08 , H02M1/44 , H02M3/156 , H02M3/158 , H02M2001/0009 , H02M2003/1566
摘要: A DC-to-DC converter employs peak current mode control and includes a cycle skipping prevent circuit. If a latch is set, then a high side switch is turned on. A comparator receives a signal indicative of current flow and a compensated error signal. The prevent circuit supplies a delayed version of a low duty cycle, fixed frequency, oscillator signal onto the set input lead of the latch. The prevent circuit gates a high signal as output by the comparator onto the reset input lead of the latch. If the output of the comparator has, however, not transitioned high by a predetermined time, then the prevent circuit gates a high pulse onto the reset input lead. Accordingly, the prevent circuit ensures that the latch is reset once every period of the signal SET. A cycle skipping prevent circuit is also disclosed for use in a converter that employs valley current mode control.
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公开(公告)号:US10340797B2
公开(公告)日:2019-07-02
申请号:US15828337
申请日:2017-11-30
申请人: Active-Semi, Inc.
发明人: Masashi Nogawa
摘要: A voltage regulator control integrated circuit includes constituent parts including an error amplifier circuit, a comparator circuit, a compensation signal generator circuit, an oscillator/one-shot circuit, a latch, and a current sense circuit. In a first example, the integrated circuit is operable in a first mode and in a second mode. In the first mode, the various parts are configured and interconnected in such a way that they operate together as a valley current mode regulator control circuit. In the second mode, the various parts are configured and interconnected in such a way that they operate together as a current-mode constant on-time mode regulator control circuit. In another example, a voltage regulator control integrated circuit has the same basic constituent parts and is operable in a first mode as a peak current mode regulator control circuit, or in a second mode as a constant off-time time mode regulator control circuit.
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公开(公告)号:US20190165676A1
公开(公告)日:2019-05-30
申请号:US15828337
申请日:2017-11-30
申请人: Active-Semi, Inc.
发明人: Masashi Nogawa
CPC分类号: H02M3/158 , H02M3/157 , H02M2001/0009 , H02M2001/0025 , H02M2003/1566
摘要: A voltage regulator control integrated circuit includes constituent parts including an error amplifier circuit, a comparator circuit, a compensation signal generator circuit, an oscillator/one-shot circuit, a latch, and a current sense circuit. In a first example, the integrated circuit is operable in a first mode and in a second mode. In the first mode, the various parts are configured and interconnected in such a way that they operate together as a valley current mode regulator control circuit. In the second mode, the various parts are configured and interconnected in such a way that they operate together as a current-mode constant on-time mode regulator control circuit. In another example, a voltage regulator control integrated circuit has the same basic constituent parts and is operable in a first mode as a peak current mode regulator control circuit, or in a second mode as a constant off-time time mode regulator control circuit.
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公开(公告)号:US11984804B2
公开(公告)日:2024-05-14
申请号:US17856581
申请日:2022-07-01
申请人: Active-Semi, Inc.
发明人: Masashi Nogawa
摘要: A resonant charge pump circuit includes a resonant circuit having a bucket capacitor and a bucket inductor connected in series, and a switching circuit connected to the resonant circuit. The switching circuit switches to a first state that enables current to flow from an input terminal into the resonant circuit to charge the bucket capacitor and the bucket inductor, and switches to a second state that enables current to flow from the resonant circuit to discharge the bucket capacitor and the bucket inductor to an output terminal. The resonant circuit controls current flow into and out from the resonant circuit when the switching circuit switches between the states. The resonant charge pump circuit also includes a timing circuit that controls when the switching circuit switches between the states.
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