公开(公告)号：US11803311B2

公开(公告)日：2023-10-31

申请号：US17218700

申请日：2021-03-31

Applicant: Advanced Micro Devices, Inc.

Inventor： Johnathan Alsop ,  Nuwan Jayasena ,  Shaizeen Aga ,  Andrew McCrabb

IPC: G06F3/06

CPC classification number: G06F3/064 ,  G06F3/0604 ,  G06F3/0644 ,  G06F3/0659 ,  G06F3/0679

Abstract: Methods and apparatuses to control digital data transfer via a memory channel between a memory module and a processor are disclosed. At least one of the memory module or the processor coalesces a plurality of short data words into multicast coalesced block data comprising a single data block for transfer via the memory channel. Each of the plurality of short data words pertains to one of at least two partitioned memory submodules in the memory module. The multicast coalesced block data is communicated over the memory channel.

公开(公告)号：US20220317876A1

公开(公告)日：2022-10-06

申请号：US17218700

申请日：2021-03-31

Applicant: Advanced Micro Devices, Inc.

Inventor： Johnathan Alsop ,  Nuwan Jayasena ,  Shaizeen Aga ,  Andrew McCrabb

IPC: G06F3/06

Abstract: Methods and apparatuses to control digital data transfer via a memory channel between a memory module and a processor are disclosed. At least one of the memory module or the processor coalesces a plurality of short data words into multicast coalesced block data comprising a single data block for transfer via the memory channel. Each of the plurality of short data words pertains to one of at least two partitioned memory submodules in the memory module. The multicast coalesced block data is communicated over the memory channel.