公开(公告)号：US20230206995A1

公开(公告)日：2023-06-29

申请号：US17564680

申请日：2021-12-29

申请人： Advanced Micro Devices, Inc.

发明人： Russell Schreiber ,  Kyle David Whittle

IPC分类号： G11C11/4099 ,  G11C11/4076 ,  G11C11/408 ,  G11C11/4094 ,  G11C11/4074 ,  G11C11/4096

CPC分类号： G11C11/4099 ,  G11C11/4076 ,  G11C11/4085 ,  G11C11/4094 ,  G11C11/4074 ,  G11C11/4096

摘要： A system and method for efficiently resetting data stored in a memory array are described. In various implementations, an integrated circuit includes a memory for storing data, and a processing unit that generates access requests for the data stored in the memory. When access circuitry of the memory array begins a reset operation, it reduces a power supply voltage level used by memory bit cells in a column of the array to a value less than a threshold voltage of transistors. Therefore, the p-type transistors of the bit cells do not contend with the write driver during a write operation. The access circuitry provides the reset data on the write bit lines, and asserts each of the write word lines of the memory array. To complete the write operation, the access circuitry returns the power supply voltage level from below the threshold voltage level to an operating voltage level.

公开(公告)号：US11929114B2

公开(公告)日：2024-03-12

申请号：US17564680

申请日：2021-12-29

申请人： Advanced Micro Devices, Inc.

发明人： Russell Schreiber ,  Kyle David Whittle

IPC分类号： G11C11/4074 ,  G11C11/4076 ,  G11C11/408 ,  G11C11/4094 ,  G11C11/4096 ,  G11C11/4099

CPC分类号： G11C11/4099 ,  G11C11/4074 ,  G11C11/4076 ,  G11C11/4085 ,  G11C11/4094 ,  G11C11/4096

摘要： A system and method for efficiently resetting data stored in a memory array are described. In various implementations, an integrated circuit includes a memory for storing data, and a processing unit that generates access requests for the data stored in the memory. When access circuitry of the memory array begins a reset operation, it reduces a power supply voltage level used by memory bit cells in a column of the array to a value less than a threshold voltage of transistors. Therefore, the p-type transistors of the bit cells do not contend with the write driver during a write operation. The access circuitry provides the reset data on the write bit lines, and asserts each of the write word lines of the memory array. To complete the write operation, the access circuitry returns the power supply voltage level from below the threshold voltage level to an operating voltage level.

公开(公告)号：US20240355380A1

公开(公告)日：2024-10-24

申请号：US18582782

申请日：2024-02-21

申请人： Advanced Micro Devices, Inc.

发明人： Russell Schreiber ,  Kyle David Whittle

IPC分类号： G11C11/4099 ,  G11C11/4074 ,  G11C11/4076 ,  G11C11/408 ,  G11C11/4094 ,  G11C11/4096

CPC分类号： G11C11/4099 ,  G11C11/4074 ,  G11C11/4076 ,  G11C11/4085 ,  G11C11/4094 ,  G11C11/4096

摘要： A system and method for efficiently resetting data stored in a memory array are described. In various implementations, an integrated circuit includes a memory for storing data, and a processing unit that generates access requests for the data stored in the memory. When access circuitry of the memory array begins a reset operation, it reduces a power supply voltage level used by memory bit cells in a column of the array to a value less than a threshold voltage of transistors. Therefore, the p-type transistors of the bit cells do not contend with the write driver during a write operation. The access circuitry provides the reset data on the write bit lines, and asserts each of the write word lines of the memory array. To complete the write operation, the access circuitry returns the power supply voltage level from below the threshold voltage level to an operating voltage level.