BUFFER MANAGEMENT FOR PLUG-IN ARCHITECTURES IN COMPUTATION GRAPH STRUCTURES

    公开(公告)号:US20190037097A1

    公开(公告)日:2019-01-31

    申请号:US15663516

    申请日:2017-07-28

    Abstract: A computer vision processing device is provided which comprises memory configured to store data and a processor. The processor is configured to store captured image data in a first buffer and acquire access to the captured image data in the first buffer when the captured image data is available for processing. The processor is also configured to execute a first group of operations in a processing pipeline, each of which processes the captured image data accessed from the first buffer and return the first buffer for storing next captured image data when a last operation of the first group of operations executes.

    Media hardware resource allocation
    3.
    发明授权
    Media hardware resource allocation 有权
    媒体硬件资源分配

    公开(公告)号:US09594594B2

    公开(公告)日:2017-03-14

    申请号:US13654694

    申请日:2012-10-18

    Abstract: Apparatus, computer readable medium, and method of allocating media resources, the method including determining a media resources allocation table based on one or more media hardware resources and predetermined benchmarks of media hardware resources for performing media operations; in response to receiving a request for media resources from a first application, comparing the requested media resources with the media resources allocation table; and if the comparison indicates that the requested media resources are available, then allocating the requested media resources to the first application in the media resources allocation table, and sending a response to the request for media resources to the first application indicating the requested media resources are allocated to the application. If the comparison indicates that the requested media resources are not available, then sending indicating to the first application that the requested media resources are not allocated to the first application.

    Abstract translation: 装置,计算机可读介质和分配媒体资源的方法,所述方法包括:基于一个或多个媒体硬件资源和用于执行媒体操作的媒体硬件资源的预定基准来确定媒体资源分配表; 响应于从第一应用接收到对媒体资源的请求,将所请求的媒体资源与媒体资源分配表进行比较; 并且如果比较指示所请求的媒体资源是可用的,则将所请求的媒体资源分配给媒体资源分配表中的第一应用,并且向媒体资源发送对媒体资源的请求的响应指示所请求的媒体资源的第一应用是 分配给应用程序。 如果比较指示请求的媒体资源不可用,则向第一应用发送指示所请求的媒体资源未被分配给第一应用的信息。

    BUFFER MANAGEMENT FOR PLUG-IN ARCHITECTURES IN COMPUTATION GRAPH STRUCTURES

    公开(公告)号:US20200344378A1

    公开(公告)日:2020-10-29

    申请号:US16925911

    申请日:2020-07-10

    Abstract: A computer vision processing device is provided which comprises memory configured to store data and a processor. The processor is configured to store captured image data in a first buffer and acquire access to the captured image data in the first buffer when the captured image data is available for processing. The processor is also configured to execute a first group of operations in a processing pipeline, each of which processes the captured image data accessed from the first buffer and return the first buffer for storing next captured image data when a last operation of the first group of operations executes.

    Device and method for compressing panoramic video images

    公开(公告)号:US10595045B2

    公开(公告)日:2020-03-17

    申请号:US15661863

    申请日:2017-07-27

    Abstract: A processing device is provided which includes memory configured to store data and a processor. The processor is configured to receive a plurality of panoramic video images representing views around a point in a three dimensional (3D) space and warp the plurality of panoramic video images, using a panoramic format, into a plurality of formatted warped images. The processor is also configured to store, in the memory, the plurality of formatted warped images and perform a motion search around each co-located pixel block of a reference panoramic frame by limiting the motion searches in a vertical direction around the co-located pixel blocks.

    FUSED SHADER PROGRAMS
    7.
    发明申请

    公开(公告)号:US20180246655A1

    公开(公告)日:2018-08-30

    申请号:US15442499

    申请日:2017-02-24

    CPC classification number: G06T1/20

    Abstract: Improvements in compute shader programs executed on parallel processing hardware are disclosed. An application or other entity defines a sequence of shader programs to execute. Each shader program defines inputs and outputs which would, if unmodified, execute as loads and stores to a general purpose memory, incurring high latency. A compiler combines the shader programs into groups that can operate in a lower-latency, but lower-capacity local data store memory. The boundaries of these combined shader programs are defined by several aspects including where memory barrier operations are to execute, whether combinations of shader programs can execute using only the local data store and not the global memory (except for initial reads and writes) and other aspects.

    METHODS AND APPARATUS FOR DECODING VIDEO USING RE-ORDERED MOTION VECTOR BUFFER

    公开(公告)号:US20210185333A1

    公开(公告)日:2021-06-17

    申请号:US17185497

    申请日:2021-02-25

    Abstract: A host processor, such as a central processing unit (CPU), programmed to execute a software driver that causes the host processor to generate a motion compensation command for a plurality of cores of a massively parallel processor, such as a graphics processing unit (GPU), to provide motion compensation for encoded video. The motion compensation command for the plurality of cores of the massively parallel processor contains executable instructions for processing a plurality of motion vectors grouped by a plurality of prediction modes from a re-ordered motion vector buffer by the plurality of cores of the massively parallel processor.

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