公开(公告)号：US20210334648A1

公开(公告)日：2021-10-28

申请号：US16894025

申请日：2020-06-05

Applicant: Advanced Micro Devices, Inc.

Inventor： Xiuyu Li ,  Jian Yang

IPC: G06N3/08 ,  G06N3/04

Abstract: An electronic device includes a memory that stores input matrices A and B, a cache memory, and a processor. The processor generates a compiled representation that includes values for acquiring data from input matrix A when processing instances of input data through the neural network, the values including a base address in input matrix A for each thread from among a number of threads and relative offsets, the relative offsets being distances between elements of input matrix A to be processed by the threads. The processor then stores, in the local cache memory, the compiled representation including the base address for each thread and the relative offsets.

公开(公告)号：US11615306B2

公开(公告)日：2023-03-28

申请号：US16894025

申请日：2020-06-05

Applicant: Advanced Micro Devices, Inc.

Inventor： Xiuyu Li ,  Jian Yang

IPC: G06N3/08 ,  G06N3/04

Abstract: An electronic device includes a memory that stores input matrices A and B, a cache memory, and a processor. The processor generates a compiled representation that includes values for acquiring data from input matrix A when processing instances of input data through the neural network, the values including a base address in input matrix A for each thread from among a number of threads and relative offsets, the relative offsets being distances between elements of input matrix A to be processed by the threads. The processor then stores, in the local cache memory, the compiled representation including the base address for each thread and the relative offsets.