公开(公告)号：US20170332096A1

公开(公告)日：2017-11-16

申请号：US15170103

申请日：2016-06-01

Applicant: Advanced Micro Devices, Inc. ,  ATI TECHNOLOGIES ULC

Inventor： Kismat Singh ,  Kadagattur Gopinatha Srinidhi ,  Mark Chan ,  Neelakanth Devappa Shigihalli ,  Kishor Kayyar Lakshminarayana

IPC: H04N19/52 ,  H04N19/182 ,  H04N19/176 ,  H04N19/184 ,  H04N19/172

CPC classification number: H04N19/42 ,  H04N19/162 ,  H04N19/172 ,  H04N19/176 ,  H04N19/182 ,  H04N19/44 ,  H04N19/46 ,  H04N19/48

Abstract: A video codec includes a stitching module configured to select stored encoded video frames that are to be composed into a concatenated frame for display. The stitching module arranges the selected encoded video frames into a specified pattern, and stitches the arranged encoded video frames together to generate a stitched encoded frame. A decoder of the video codec then decodes the stitched encoded frame to generate the frame for display. By stitching together the encoded video frames prior to decoding, the video codec reduces the number of times the decoder must be initialized,