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公开(公告)号:US20240354268A1
公开(公告)日:2024-10-24
申请号:US18620731
申请日:2024-03-28
Applicant: Advanced Micro Devices, Inc. , ATI Technologies ULC
Inventor: HaiKun Dong , Kostantinos Danny Christidis , Ling-Ling Wang , MinHua Wu , Gaojian Cong , Rui Wang
CPC classification number: G06F13/1673 , G06F3/0604 , G06F3/0659 , G06F3/0688
Abstract: Systems, apparatuses, and methods for implementing duplicated registers for access by initiators across multiple semiconductor dies are disclosed. A system includes multiple initiators on multiple semiconductor dies of a chiplet processor. One of the semiconductor dies is the master die, and this master die has copies of registers which can be accessed by the multiple initiators on the multiple semiconductor dies. When a given initiator on a given secondary die generates a register access, the register access is routed to the master die and a particular duplicate copy of the register maintained for the given secondary die. From the point of view of software, the multiple semiconductor dies appear as a single die, and the multiple initiators appear as a single initiator. Multiple types of registers can be maintained by the master die, with a flush register being one of the register types.
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公开(公告)号:US11947473B2
公开(公告)日:2024-04-02
申请号:US17499494
申请日:2021-10-12
Applicant: Advanced Micro Devices, Inc. , ATI Technologies ULC
Inventor: Haikun Dong , Kostantinos Danny Christidis , Ling-Ling Wang , MinHua Wu , Gaojian Cong , Rui Wang
CPC classification number: G06F13/1673 , G06F3/0604 , G06F3/0659 , G06F3/0688
Abstract: Systems, apparatuses, and methods for implementing duplicated registers for access by initiators across multiple semiconductor dies are disclosed. A system includes multiple initiators on multiple semiconductor dies of a chiplet processor. One of the semiconductor dies is the master die, and this master die has copies of registers which can be accessed by the multiple initiators on the multiple semiconductor dies. When a given initiator on a given secondary die generates a register access, the register access is routed to the master die and a particular duplicate copy of the register maintained for the given secondary die. From the point of view of software, the multiple semiconductor dies appear as a single die, and the multiple initiators appear as a single initiator. Multiple types of registers can be maintained by the master die, with a flush register being one of the register types.
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公开(公告)号:US20230115819A1
公开(公告)日:2023-04-13
申请号:US17499494
申请日:2021-10-12
Applicant: Advanced Micro Devices, Inc. , ATI Technologies ULC
Inventor: HaiKun Dong , Kostantinos Danny Christidis , Ling-Ling Wang , MinHua Wu , Gaojian Cong , Rui Wang
Abstract: Systems, apparatuses, and methods for implementing duplicated registers for access by initiators across multiple semiconductor dies are disclosed. A system includes multiple initiators on multiple semiconductor dies of a chiplet processor. One of the semiconductor dies is the master die, and this master die has copies of registers which can be accessed by the multiple initiators on the multiple semiconductor dies. When a given initiator on a given secondary die generates a register access, the register access is routed to the master die and a particular duplicate copy of the register maintained for the given secondary die. From the point of view of software, the multiple semiconductor dies appear as a single die, and the multiple initiators appear as a single initiator. Multiple types of registers can be maintained by the master die, with a flush register being one of the register types.
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