公开(公告)号：US11913132B2

公开(公告)日：2024-02-27

申请号：US17747981

申请日：2022-05-18

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Chia Chun Hsu ,  Chin-Feng Wang

IPC: C25D5/18 ,  C25D7/12 ,  C25D5/08 ,  H01L23/00 ,  H01L21/56 ,  C25D5/00

CPC classification number: C25D5/18 ,  C25D5/007 ,  C25D5/08 ,  C25D7/12 ,  H01L21/561 ,  H01L21/568 ,  H01L24/18 ,  H01L24/96

Abstract: A method for manufacturing a package includes generating an electric field between an anode and a cathode in an electroplating solution to electroplate a substrate electrically connected to the cathode; depositing metal on a central region of the substrate with a first deposition rate; depositing metal on an outer region of the substrate with a second deposition rate lower than the first deposition rate; and reducing the first deposition rate.

公开(公告)号：US10344383B2

公开(公告)日：2019-07-09

申请号：US15668632

申请日：2017-08-03

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Chuan-Yung Shih ,  Tai-Yuan Huang ,  Yu-Chi Wang ,  Chin-Feng Wang ,  Sing-Syuan Shiau ,  Chun-Wei Shih ,  Shao-Ci Huang ,  Huang-Hsien Chang ,  Yuan-Feng Chiang

IPC: H01L21/02 ,  C23C16/458 ,  H01L21/285 ,  H01L21/677 ,  H01L21/687

Abstract: In one or more embodiments, an apparatus for processing a wafer includes a ceramic wall, a metal wall and a frame. The ceramic wall defines a chamber for accommodating the wafer. The ceramic wall has a first surface defining a first opening. The metal wall surrounds the ceramic wall. The metal wall has a second surface defining a second opening adjacent to the first opening. The frame covers the second surface.