公开(公告)号：US20230144000A1

公开(公告)日：2023-05-11

申请号：US17522823

申请日：2021-11-09

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Jun-Wei CHEN ,  Yu-Yuan YEH ,  Hsu-Nan FANG

IPC: H01L31/12 ,  H01L31/02

CPC classification number: H01L31/12 ,  H01L31/02005

Abstract: An electronic package is provided. The electronic package includes a carrier, a first electronic component, a bonding element, and a barrier. The carrier has a conductive layer. The first electronic component is disposed adjacent to the carrier and has a first terminal and a second terminal. The bonding element is configured to electrically connect the conductive layer to the first terminal. The barrier is configured to avoid electrically bypassing an electrical path in the first electronic component and between the first terminal and the second terminal.

公开(公告)号：US20230003956A1

公开(公告)日：2023-01-05

申请号：US17364431

申请日：2021-06-30

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Chang-Feng YOU ,  Yu-Yuan YEH ,  Jun-Wei CHEN

IPC: G02B6/42

Abstract: A semiconductor package structure and a method of manufacturing the same are provided. A semiconductor package structure includes a first electronic component and a light emitter. The photonic component includes a substrate and a first port. The light emitter is disposed over the substrate of the photonic component. The light emitter is configured to emit light through the first port. A coupling loss between the first port of the photonic component and the light emitter is less than 3 dB.

公开(公告)号：US20200294964A1

公开(公告)日：2020-09-17

申请号：US16354156

申请日：2019-03-14

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Fan-Yu MIN ,  Chao-Hung WENG ,  Wei-Hang TAI ,  Chen-Hung LEE ,  Yu-Yuan YEH

IPC: H01L25/065 ,  H01L23/00 ,  H01L23/31 ,  H01L25/00 ,  H01L21/56 ,  H01L23/538

Abstract: A semiconductor package structure includes a conductive structure, a first semiconductor chip, a second semiconductor chip, a first encapsulant and an upper semiconductor chip. The first semiconductor chip is electrically connected to the conductive structure. The first semiconductor chip includes at least one first conductive element disposed adjacent to a second surface thereof. The second semiconductor chip is electrically connected to the conductive structure and disposed next to the first semiconductor chip. The second semiconductor chip includes at least one second conductive element disposed adjacent to a second surface thereof. The first encapsulant is disposed on the conductive structure to cover the first semiconductor chip and the second semiconductor chip. The first conductive element and the second conductive element are exposed from the first encapsulant. The upper semiconductor chip is disposed on the first encapsulant and electrically connected to the first conductive element and the second conductive element.