Reading circuit for a resistive memory cell
    1.
    发明授权
    Reading circuit for a resistive memory cell 有权
    电阻式存储单元的读取电路

    公开(公告)号:US08867260B2

    公开(公告)日:2014-10-21

    申请号:US13869146

    申请日:2013-04-24

    CPC classification number: G11C13/004 G11C13/0002

    Abstract: A reading circuit for a resistive memory cell is provided, the circuit including a current source, a precharge switch, a comparator circuit including a first input node (in-node), and a second in-node, the precharge switch configured to couple the current source to the first in-node to apply a precharge voltage during a first reading time period, and to decouple the current source during a second reading time period, the comparator circuit configured to operate during a third reading time period, a memory cell access switch to enable a current flow at least partially during the second and the third reading time periods through a memory cell, the comparator circuit configured to compare a voltage at the first in-node with a reference voltage at the second in-node and to determine a programming state of the memory cell based on the voltage at the first in-node during the third reading time period.

    Abstract translation: 提供了一种用于电阻式存储单元的读取电路,该电路包括电流源,预充电开关,包括第一输入节点(节点内)和第二节点内的比较器电路,所述预充电开关被配置为将 电流源到第一节点内以在第一读取时间段期间施加预充电电压,并且在第二读取时间段期间对电流源解耦,所述比较器电路被配置为在第三读取时间段期间操作存储器单元访问 切换以在第二和第三读取时间段期间至少部分地通过存储器单元实现电流,比较器电路被配置为将第一节点处的电压与第二节点内的参考电压进行比较,并且确定 基于在第三读取时段期间的第一节点处的电压的存储器单元的编程状态。

    READING CIRCUIT FOR A RESISTIVE MEMORY CELL
    2.
    发明申请
    READING CIRCUIT FOR A RESISTIVE MEMORY CELL 有权
    读电路用于电阻记忆体

    公开(公告)号:US20130279237A1

    公开(公告)日:2013-10-24

    申请号:US13869146

    申请日:2013-04-24

    CPC classification number: G11C13/004 G11C13/0002

    Abstract: A reading circuit for a resistive memory cell is provided, the circuit including a current source, a precharge switch, a comparator circuit including a first input node (in-node), and a second in-node, the precharge switch configured to couple the current source to the first in-node to apply a precharge voltage during a first reading time period, and to decouple the current source during a second reading time period, the comparator circuit configured to operate during a third reading time period, a memory cell access switch to enable a current flow at least partially during the second and the third reading time periods through a memory cell, the comparator circuit configured to compare a voltage at the first in-node with a reference voltage at the second in-node and to determine a programming state of the memory cell based on the voltage at the first in-node during the third reading time period.

    Abstract translation: 提供了一种用于电阻式存储单元的读取电路,该电路包括电流源,预充电开关,包括第一输入节点(节点内)和第二节点内的比较器电路,所述预充电开关被配置为将 电流源到第一节点内以在第一读取时间段期间施加预充电电压,并且在第二读取时间段期间对电流源解耦,所述比较器电路被配置为在第三读取时间段期间操作存储器单元访问 切换以在第二和第三读取时间段期间至少部分地通过存储器单元实现电流,比较器电路被配置为将第一节点处的电压与第二节点内的参考电压进行比较,并且确定 基于在第三读取时段期间的第一节点处的电压的存储器单元的编程状态。

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